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File indexing completed on 2025-05-11 08:22:53

0001 /*
0002  * Copyright 2014-2016 Freescale Semiconductor, Inc.
0003  * Copyright 2016-2021 NXP
0004  * All rights reserved.
0005  *
0006  * SPDX-License-Identifier: BSD-3-Clause
0007  *
0008  */
0009 
0010 #ifndef __FSL_DEVICE_REGISTERS_H__
0011 #define __FSL_DEVICE_REGISTERS_H__
0012 
0013 #ifdef __rtems__
0014 #include <bspopts.h>
0015 #endif /* __rtems__ */
0016 /*
0017  * Include the cpu specific register header files.
0018  *
0019  * The CPU macro should be declared in the project or makefile.
0020  */
0021 #if (defined(CPU_MIMXRT1166CVM5A_cm7) || defined(CPU_MIMXRT1166DVM6A_cm7) || defined(CPU_MIMXRT1166XVM5A_cm7))
0022 
0023 #define MIMXRT1166_cm7_SERIES
0024 
0025 /* CMSIS-style register definitions */
0026 #include "MIMXRT1166_cm7.h"
0027 /* CPU specific feature definitions */
0028 #include "MIMXRT1166_cm7_features.h"
0029 
0030 #elif (defined(CPU_MIMXRT1166CVM5A_cm4) || defined(CPU_MIMXRT1166DVM6A_cm4) || defined(CPU_MIMXRT1166XVM5A_cm4))
0031 
0032 #define MIMXRT1166_cm4_SERIES
0033 
0034 /* CMSIS-style register definitions */
0035 #include "MIMXRT1166_cm4.h"
0036 /* CPU specific feature definitions */
0037 #include "MIMXRT1166_cm4_features.h"
0038 
0039 #else
0040     #error "No valid CPU defined!"
0041 #endif
0042 
0043 #endif /* __FSL_DEVICE_REGISTERS_H__ */
0044 
0045 /*******************************************************************************
0046  * EOF
0047  ******************************************************************************/