devices/MIMXRT1052/system_MIMXRT1052.h

0001 /*
0002 ** ###################################################################
0003 **     Processors:          MIMXRT1052CVJ5B
0004 **                          MIMXRT1052CVL5B
0005 **                          MIMXRT1052DVJ6B
0006 **                          MIMXRT1052DVL6B
0007 **
0008 **     Compilers:           Freescale C/C++ for Embedded ARM
0009 **                          GNU C Compiler
0010 **                          IAR ANSI C/C++ Compiler for ARM
0011 **                          Keil ARM C/C++ Compiler
0012 **                          MCUXpresso Compiler
0013 **
0014 **     Reference manual:    IMXRT1050RM Rev.5, 07/2021 | IMXRT1050SRM Rev.2
0015 **     Version:             rev. 1.4, 2021-08-10
0016 **     Build:               b210811
0017 **
0018 **     Abstract:
0019 **         Provides a system configuration function and a global variable that
0020 **         contains the system frequency. It configures the device and initializes
0021 **         the oscillator (PLL) that is part of the microcontroller device.
0022 **
0023 **     Copyright 2016 Freescale Semiconductor, Inc.
0024 **     Copyright 2016-2021 NXP
0025 **     All rights reserved.
0026 **
0027 **     SPDX-License-Identifier: BSD-3-Clause
0028 **
0029 **     http:                 www.nxp.com
0030 **     mail:                 support@nxp.com
0031 **
0032 **     Revisions:
0033 **     - rev. 0.1 (2017-01-10)
0034 **         Initial version.
0035 **     - rev. 1.0 (2018-09-21)
0036 **         Update interrupt vector table and dma request source.
0037 **         Update register BEE_ADDR_OFFSET1's bitfield name to ADDR_OFFSET1.
0038 **         Split GPIO_COMBINED_IRQS to GPIO_COMBINED_LOW_IRQS and GPIO_COMBINED_HIGH_IRQS.
0039 **     - rev. 1.1 (2018-11-16)
0040 **         Update header files to align with IMXRT1050RM Rev.1.
0041 **     - rev. 1.2 (2018-11-27)
0042 **         Update header files to align with IMXRT1050RM Rev.2.1.
0043 **     - rev. 1.3 (2019-04-29)
0044 **         Add SET/CLR/TOG register group to register CTRL, STAT, CHANNELCTRL, CH0STAT, CH0OPTS, CH1STAT, CH1OPTS, CH2STAT, CH2OPTS, CH3STAT, CH3OPTS of DCP module.
0045 **     - rev. 1.4 (2021-08-10)
0046 **         Update header files to align with IMXRT1050RM Rev.5.
0047 **
0048 ** ###################################################################
0049 */
0050
0051 /*!
0052  * @file MIMXRT1052
0053  * @version 1.4
0054  * @date 2021-08-10
0055  * @brief Device specific configuration file for MIMXRT1052 (header file)
0056  *
0057  * Provides a system configuration function and a global variable that contains
0058  * the system frequency. It configures the device and initializes the oscillator
0059  * (PLL) that is part of the microcontroller device.
0060  */
0061
0062 #ifndef _SYSTEM_MIMXRT1052_H_
0063 #define _SYSTEM_MIMXRT1052_H_                    /**< Symbol preventing repeated inclusion */
0064
0065 #ifdef __cplusplus
0066 extern "C" {
0067 #endif
0068
0069 #include <stdint.h>
0070
0071
0072 #ifndef DISABLE_WDOG
0073   #define DISABLE_WDOG                 1
0074 #endif
0075
0076 /* Define clock source values */
0077
0078 #define CPU_XTAL_CLK_HZ                24000000UL          /* Value of the external crystal or oscillator clock frequency in Hz */
0079
0080 #define CPU_CLK1_HZ                    0UL                 /* Value of the CLK1 (select the CLK1_N/CLK1_P as source) frequency in Hz */
0081                                                            /* If CLOCK1_P,CLOCK1_N is choose as the pll bypass clock source, please implement the CLKPN_FREQ define, otherwise 0 will be returned. */
0082
0083 #define DEFAULT_SYSTEM_CLOCK           528000000UL         /* Default System clock value */
0084
0085
0086 /**
0087  * @brief System clock frequency (core clock)
0088  *
0089  * The system clock frequency supplied to the SysTick timer and the processor
0090  * core clock. This variable can be used by the user application to setup the
0091  * SysTick timer or configure other parameters. It may also be used by debugger to
0092  * query the frequency of the debug timer or configure the trace clock speed
0093  * SystemCoreClock is initialized with a correct predefined value.
0094  */
0095 extern uint32_t SystemCoreClock;
0096
0097 /**
0098  * @brief Setup the microcontroller system.
0099  *
0100  * Typically this function configures the oscillator (PLL) that is part of the
0101  * microcontroller device. For systems with variable clock speed it also updates
0102  * the variable SystemCoreClock. SystemInit is called from startup_device file.
0103  */
0104 void SystemInit (void);
0105
0106 /**
0107  * @brief Updates the SystemCoreClock variable.
0108  *
0109  * It must be called whenever the core clock is changed during program
0110  * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
0111  * the current core clock.
0112  */
0113 void SystemCoreClockUpdate (void);
0114
0115 /**
0116  * @brief SystemInit function hook.
0117  *
0118  * This weak function allows to call specific initialization code during the
0119  * SystemInit() execution.This can be used when an application specific code needs
0120  * to be called as close to the reset entry as possible (for example the Multicore
0121  * Manager MCMGR_EarlyInit() function call).
0122  * NOTE: No global r/w variables can be used in this hook function because the
0123  * initialization of these variables happens after this function.
0124  */
0125 void SystemInitHook (void);
0126
0127 #ifdef __cplusplus
0128 }
0129 #endif
0130
0131 #endif  /* _SYSTEM_MIMXRT1052_H_ */