Warning, /bsps/arm/imxrt/dts/imxrt1050-evkb.dts is written in an unsupported language. File is not indexed.
0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004 * Copyright (C) 2020 embedded brains GmbH & Co. KG
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions
0008 * are met:
0009 * 1. Redistributions of source code must retain the above copyright
0010 * notice, this list of conditions and the following disclaimer.
0011 * 2. Redistributions in binary form must reproduce the above copyright
0012 * notice, this list of conditions and the following disclaimer in the
0013 * documentation and/or other materials provided with the distribution.
0014 *
0015 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025 * POSSIBILITY OF SUCH DAMAGE.
0026 */
0027
0028 /*
0029 * FIXME: Compilation should be automated.
0030 *
0031 * Compile this file with the following commands:
0032 * export BSP_DIR="${RTEMS_SRC_DIR}/bsps/arm/imxrt/"
0033 * arm-rtems6-cpp -P -x assembler-with-cpp -I "${BSP_DIR}/include/" -include "${BSP_DIR}/dts/imxrt1050-evkb.dts" /dev/null | \
0034 * dtc -O dtb -o "${BSP_DIR}/dts/imxrt1050-evkb.dtb" -b 0 -p 64
0035 * rtems-bin2c -A 8 -C -N imxrt_dtb "${BSP_DIR}/dts/imxrt1050-evkb.dtb" "${BSP_DIR}/dts/imxrt1050-evkb.tmp.c"
0036 * head -27 "${BSP_DIR}/dts/imxrt1050-evkb.dts" > "${BSP_DIR}/dts/imxrt1050-evkb.c"
0037 * cat "${BSP_DIR}/dts/imxrt1050-evkb.tmp.c" >> "${BSP_DIR}/dts/imxrt1050-evkb.c"
0038 */
0039
0040 /dts-v1/;
0041
0042 #include <imxrt/imxrt1050-pinfunc.h>
0043 #include <imxrt/imxrt1050.dtsi>
0044
0045 &lpuart1 {
0046 pinctrl-0 = <&pinctrl_lpuart1>;
0047 status = "okay";
0048 };
0049
0050 &chosen {
0051 stdout-path = &lpuart1;
0052 };
0053
0054 &lpuart3 {
0055 pinctrl-0 = <&pinctrl_lpuart3>;
0056 status = "okay";
0057 };
0058
0059 &lpspi1 {
0060 pinctrl-0 = <&pinctrl_lpspi1>;
0061 status = "okay";
0062 };
0063
0064 &lpi2c1 {
0065 pinctrl-0 = <&pinctrl_lpi2c1>;
0066 status = "okay";
0067 };
0068
0069 &fec1 {
0070 pinctrl-0 = <&pinctrl_fec1>;
0071 phy-reset-gpios = <&gpio1 9 1>;
0072 rtems,phy-interrupt-gpios = <&gpio1 10 1>;
0073 status = "okay";
0074 };
0075
0076 &iomuxc {
0077 pinctrl_lpuart1: lpuart1grp {
0078 fsl,pins = <
0079 IMXRT_PAD_GPIO_AD_B0_12__LPUART1_TX 0x8
0080 IMXRT_PAD_GPIO_AD_B0_13__LPUART1_RX 0x13000
0081 >;
0082 };
0083
0084 pinctrl_lpuart3: lpuart3grp {
0085 fsl,pins = <
0086 IMXRT_PAD_GPIO_AD_B1_06__LPUART3_TX 0x8
0087 IMXRT_PAD_GPIO_AD_B1_07__LPUART3_RX 0x13000
0088 >;
0089 };
0090
0091 pinctrl_lpspi1: lpspi1grp {
0092 fsl,pins = <
0093 IMXRT_PAD_GPIO_SD_B0_01__LPSPI1_PCS0 0x8
0094 IMXRT_PAD_GPIO_SD_B0_02__LPSPI1_SDO 0x8
0095 IMXRT_PAD_GPIO_SD_B0_03__LPSPI1_SDI 0x1b000
0096 IMXRT_PAD_GPIO_SD_B0_00__LPSPI1_SCK 0x8
0097 >;
0098 };
0099
0100 pinctrl_lpi2c1: lpi2c1grp {
0101 fsl,pins = <
0102 IMXRT_PAD_GPIO_AD_B1_00__LPI2C1_SCL 0x4000f830
0103 IMXRT_PAD_GPIO_AD_B1_01__LPI2C1_SDA 0x4000f830
0104 >;
0105 };
0106
0107 pinctrl_fec1: fec1grp {
0108 fsl,pins = <
0109 IMXRT_PAD_GPIO_EMC_41__ENET_enet_mdio 0xb829
0110 IMXRT_PAD_GPIO_EMC_40__ENET_enet_mdc 0xb0e9
0111 IMXRT_PAD_GPIO_B1_04__ENET_enet_rx_data0 0xb0e9
0112 IMXRT_PAD_GPIO_B1_05__ENET_enet_rx_data1 0xb0e9
0113 IMXRT_PAD_GPIO_B1_06__ENET_enet_rx_en 0xb0e9
0114 IMXRT_PAD_GPIO_B1_07__ENET_enet_tx_data0 0xb0e9
0115 IMXRT_PAD_GPIO_B1_08__ENET_enet_tx_data1 0xb0e9
0116 IMXRT_PAD_GPIO_B1_09__ENET_enet_tx_en 0xb0e9
0117 IMXRT_PAD_GPIO_B1_10__ENET_enet_ref_clk 0x40000031
0118 IMXRT_PAD_GPIO_B1_11__ENET_enet_rx_er 0xb0e9
0119 /* ENET_RST */
0120 IMXRT_PAD_GPIO_AD_B0_09__GPIO1_gpio_io09 0x810
0121 /* ENET_INT */
0122 IMXRT_PAD_GPIO_AD_B0_10__GPIO1_gpio_io10 0xb0a9
0123 >;
0124 };
0125 };
