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File indexing completed on 2025-05-11 08:22:50
0001 /* 0002 * Copyright 2017-2023 NXP 0003 * All rights reserved. 0004 * 0005 * SPDX-License-Identifier: BSD-3-Clause 0006 */ 0007 0008 /*********************************************************************************************************************** 0009 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file 0010 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. 0011 **********************************************************************************************************************/ 0012 0013 #include "dcd.h" 0014 0015 /* Component ID definition, used by tools. */ 0016 #ifndef FSL_COMPONENT_ID 0017 #define FSL_COMPONENT_ID "platform.drivers.xip_board" 0018 #endif 0019 0020 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) 0021 #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1) 0022 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) 0023 __attribute__((section(".boot_hdr.dcd_data"), used)) 0024 #elif defined(__ICCARM__) 0025 #pragma location = ".boot_hdr.dcd_data" 0026 #endif 0027 0028 /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* 0029 !!GlobalInfo 0030 product: DCDx v3.0 0031 processor: MIMXRT1166xxxxx 0032 package_id: MIMXRT1166DVM6A 0033 mcu_data: ksdk2_0 0034 processor_version: 13.0.2 0035 output_format: c_array 0036 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ 0037 /* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */ 0038 const uint8_t dcd_data[] = { 0039 /* HEADER */ 0040 /* Tag */ 0041 0xD2, 0042 /* Image Length */ 0043 0x03, 0x98, 0044 /* Version */ 0045 0x41, 0046 0047 /* COMMANDS */ 0048 0049 /* group: 'SDRAM Initialization' */ 0050 /* #1.1-93, command header bytes for merged 'Write - value' command */ 0051 0xCC, 0x02, 0xEC, 0x04, 0052 /* #1.1, command: write_value, address: CCM_CLOCK_ROOT4_CONTROL, value: 0x703, size: 4, comment: 'SEMC_CLKROOT = SYS_PLL2_PFD1 / 2' */ 0053 0x40, 0xCC, 0x02, 0x00, 0x00, 0x00, 0x07, 0x03, 0054 /* #1.2, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_09, value: 0x00, size: 4, comment: 'SEMC_ADDR00' */ 0055 0x40, 0x0E, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00, 0056 /* #1.3, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_10, value: 0x00, size: 4, comment: 'SEMC_ADDR01' */ 0057 0x40, 0x0E, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, 0058 /* #1.4, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_11, value: 0x00, size: 4, comment: 'SEMC_ADDR02' */ 0059 0x40, 0x0E, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00, 0060 /* #1.5, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_12, value: 0x00, size: 4, comment: 'SEMC_ADDR03' */ 0061 0x40, 0x0E, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0062 /* #1.6, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_13, value: 0x00, size: 4, comment: 'SEMC_ADDR04' */ 0063 0x40, 0x0E, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00, 0064 /* #1.7, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_14, value: 0x00, size: 4, comment: 'SEMC_ADDR05' */ 0065 0x40, 0x0E, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, 0066 /* #1.8, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_15, value: 0x00, size: 4, comment: 'SEMC_ADDR06' */ 0067 0x40, 0x0E, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00, 0068 /* #1.9, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_16, value: 0x00, size: 4, comment: 'SEMC_ADDR07' */ 0069 0x40, 0x0E, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, 0070 /* #1.10, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_17, value: 0x00, size: 4, comment: 'SEMC_ADDR08' */ 0071 0x40, 0x0E, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00, 0072 /* #1.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_18, value: 0x00, size: 4, comment: 'SEMC_ADDR09' */ 0073 0x40, 0x0E, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, 0074 /* #1.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_23, value: 0x00, size: 4, comment: 'SEMC_ADDR10' */ 0075 0x40, 0x0E, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00, 0076 /* #1.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_19, value: 0x00, size: 4, comment: 'SEMC_ADDR11' */ 0077 0x40, 0x0E, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00, 0078 /* #1.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_20, value: 0x00, size: 4, comment: 'SEMC_ADDR12' */ 0079 0x40, 0x0E, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, 0080 /* #1.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_21, value: 0x00, size: 4, comment: 'SEMC_BA0' */ 0081 0x40, 0x0E, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00, 0082 /* #1.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_22, value: 0x00, size: 4, comment: 'SEMC_BA1' */ 0083 0x40, 0x0E, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, 0084 /* #1.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_27, value: 0x00, size: 4, comment: 'SEMC_CKE' */ 0085 0x40, 0x0E, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00, 0086 /* #1.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_26, value: 0x00, size: 4, comment: 'SEMC_CLK' */ 0087 0x40, 0x0E, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, 0088 /* #1.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_29, value: 0x00, size: 4, comment: 'SEMC_CS0' */ 0089 0x40, 0x0E, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00, 0090 /* #1.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_28, value: 0x00, size: 4, comment: 'SEMC_WE' */ 0091 0x40, 0x0E, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0092 /* #1.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_24, value: 0x00, size: 4, comment: 'SEMC_CAS' */ 0093 0x40, 0x0E, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, 0094 /* #1.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_25, value: 0x00, size: 4, comment: 'SEMC_RAS' */ 0095 0x40, 0x0E, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00, 0096 /* #1.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_08, value: 0x00, size: 4, comment: 'SEMC_DM00' */ 0097 0x40, 0x0E, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0098 /* #1.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_38, value: 0x00, size: 4, comment: 'SEMC_DM01' */ 0099 0x40, 0x0E, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, 0100 /* #1.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_00, value: 0x00, size: 4, comment: 'SEMC_DATA00' */ 0101 0x40, 0x0E, 0x80, 0x10, 0x00, 0x00, 0x00, 0x00, 0102 /* #1.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_01, value: 0x00, size: 4, comment: 'SEMC_DATA01' */ 0103 0x40, 0x0E, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, 0104 /* #1.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_02, value: 0x00, size: 4, comment: 'SEMC_DATA02' */ 0105 0x40, 0x0E, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, 0106 /* #1.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_03, value: 0x00, size: 4, comment: 'SEMC_DATA03' */ 0107 0x40, 0x0E, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00, 0108 /* #1.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_04, value: 0x00, size: 4, comment: 'SEMC_DATA04' */ 0109 0x40, 0x0E, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, 0110 /* #1.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_05, value: 0x00, size: 4, comment: 'SEMC_DATA05' */ 0111 0x40, 0x0E, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00, 0112 /* #1.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_06, value: 0x00, size: 4, comment: 'SEMC_DATA06' */ 0113 0x40, 0x0E, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, 0114 /* #1.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_07, value: 0x00, size: 4, comment: 'SEMC_DATA07' */ 0115 0x40, 0x0E, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00, 0116 /* #1.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_30, value: 0x00, size: 4, comment: 'SEMC_DATA08' */ 0117 0x40, 0x0E, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, 0118 /* #1.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_31, value: 0x00, size: 4, comment: 'SEMC_DATA09' */ 0119 0x40, 0x0E, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00, 0120 /* #1.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_32, value: 0x00, size: 4, comment: 'SEMC_DATA10' */ 0121 0x40, 0x0E, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, 0122 /* #1.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_33, value: 0x00, size: 4, comment: 'SEMC_DATA11' */ 0123 0x40, 0x0E, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00, 0124 /* #1.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_34, value: 0x00, size: 4, comment: 'SEMC_DATA12' */ 0125 0x40, 0x0E, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, 0126 /* #1.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_35, value: 0x00, size: 4, comment: 'SEMC_DATA13' */ 0127 0x40, 0x0E, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00, 0128 /* #1.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_36, value: 0x00, size: 4, comment: 'SEMC_DATA14' */ 0129 0x40, 0x0E, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, 0130 /* #1.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_37, value: 0x00, size: 4, comment: 'SEMC_DATA15' */ 0131 0x40, 0x0E, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00, 0132 /* #1.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_39, value: 0x10, size: 4, comment: 'SEMC_DQS' */ 0133 0x40, 0x0E, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x10, 0134 /* #1.42, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_09, value: 0x08, size: 4, comment: 'SEMC_ADDR00' */ 0135 0x40, 0x0E, 0x82, 0x78, 0x00, 0x00, 0x00, 0x08, 0136 /* #1.43, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_10, value: 0x08, size: 4, comment: 'SEMC_ADDR01' */ 0137 0x40, 0x0E, 0x82, 0x7C, 0x00, 0x00, 0x00, 0x08, 0138 /* #1.44, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_11, value: 0x08, size: 4, comment: 'SEMC_ADDR02' */ 0139 0x40, 0x0E, 0x82, 0x80, 0x00, 0x00, 0x00, 0x08, 0140 /* #1.45, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_12, value: 0x08, size: 4, comment: 'SEMC_ADDR03' */ 0141 0x40, 0x0E, 0x82, 0x84, 0x00, 0x00, 0x00, 0x08, 0142 /* #1.46, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_13, value: 0x08, size: 4, comment: 'SEMC_ADDR04' */ 0143 0x40, 0x0E, 0x82, 0x88, 0x00, 0x00, 0x00, 0x08, 0144 /* #1.47, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_14, value: 0x08, size: 4, comment: 'SEMC_ADDR05' */ 0145 0x40, 0x0E, 0x82, 0x8C, 0x00, 0x00, 0x00, 0x08, 0146 /* #1.48, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_15, value: 0x08, size: 4, comment: 'SEMC_ADDR06' */ 0147 0x40, 0x0E, 0x82, 0x90, 0x00, 0x00, 0x00, 0x08, 0148 /* #1.49, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_16, value: 0x08, size: 4, comment: 'SEMC_ADDR07' */ 0149 0x40, 0x0E, 0x82, 0x94, 0x00, 0x00, 0x00, 0x08, 0150 /* #1.50, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_17, value: 0x08, size: 4, comment: 'SEMC_ADDR08' */ 0151 0x40, 0x0E, 0x82, 0x98, 0x00, 0x00, 0x00, 0x08, 0152 /* #1.51, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_18, value: 0x08, size: 4, comment: 'SEMC_ADDR09' */ 0153 0x40, 0x0E, 0x82, 0x9C, 0x00, 0x00, 0x00, 0x08, 0154 /* #1.52, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_23, value: 0x08, size: 4, comment: 'SEMC_ADDR10' */ 0155 0x40, 0x0E, 0x82, 0xB0, 0x00, 0x00, 0x00, 0x08, 0156 /* #1.53, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_19, value: 0x08, size: 4, comment: 'SEMC_ADDR11' */ 0157 0x40, 0x0E, 0x82, 0xA0, 0x00, 0x00, 0x00, 0x08, 0158 /* #1.54, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_20, value: 0x08, size: 4, comment: 'SEMC_ADDR12' */ 0159 0x40, 0x0E, 0x82, 0xA4, 0x00, 0x00, 0x00, 0x08, 0160 /* #1.55, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_21, value: 0x08, size: 4, comment: 'SEMC_BA0' */ 0161 0x40, 0x0E, 0x82, 0xA8, 0x00, 0x00, 0x00, 0x08, 0162 /* #1.56, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_22, value: 0x08, size: 4, comment: 'SEMC_BA1' */ 0163 0x40, 0x0E, 0x82, 0xAC, 0x00, 0x00, 0x00, 0x08, 0164 /* #1.57, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_27, value: 0x08, size: 4, comment: 'SEMC_CKE' */ 0165 0x40, 0x0E, 0x82, 0xC0, 0x00, 0x00, 0x00, 0x08, 0166 /* #1.58, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_26, value: 0x08, size: 4, comment: 'SEMC_CLK' */ 0167 0x40, 0x0E, 0x82, 0xBC, 0x00, 0x00, 0x00, 0x08, 0168 /* #1.59, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_29, value: 0x04, size: 4, comment: 'SEMC_CS0' */ 0169 0x40, 0x0E, 0x82, 0xC8, 0x00, 0x00, 0x00, 0x04, 0170 /* #1.60, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_28, value: 0x08, size: 4, comment: 'SEMC_WE' */ 0171 0x40, 0x0E, 0x82, 0xC4, 0x00, 0x00, 0x00, 0x08, 0172 /* #1.61, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_24, value: 0x08, size: 4, comment: 'SEMC_CAS' */ 0173 0x40, 0x0E, 0x82, 0xB4, 0x00, 0x00, 0x00, 0x08, 0174 /* #1.62, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_25, value: 0x08, size: 4, comment: 'SEMC_RAS' */ 0175 0x40, 0x0E, 0x82, 0xB8, 0x00, 0x00, 0x00, 0x08, 0176 /* #1.63, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_08, value: 0x08, size: 4, comment: 'SEMC_DM00' */ 0177 0x40, 0x0E, 0x82, 0x74, 0x00, 0x00, 0x00, 0x08, 0178 /* #1.64, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_38, value: 0x08, size: 4, comment: 'SEMC_DM01' */ 0179 0x40, 0x0E, 0x82, 0xEC, 0x00, 0x00, 0x00, 0x08, 0180 /* #1.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_00, value: 0x08, size: 4, comment: 'SEMC_DATA00' */ 0181 0x40, 0x0E, 0x82, 0x54, 0x00, 0x00, 0x00, 0x08, 0182 /* #1.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_01, value: 0x08, size: 4, comment: 'SEMC_DATA01' */ 0183 0x40, 0x0E, 0x82, 0x58, 0x00, 0x00, 0x00, 0x08, 0184 /* #1.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_02, value: 0x08, size: 4, comment: 'SEMC_DATA02' */ 0185 0x40, 0x0E, 0x82, 0x5C, 0x00, 0x00, 0x00, 0x08, 0186 /* #1.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_03, value: 0x08, size: 4, comment: 'SEMC_DATA03' */ 0187 0x40, 0x0E, 0x82, 0x60, 0x00, 0x00, 0x00, 0x08, 0188 /* #1.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_04, value: 0x08, size: 4, comment: 'SEMC_DATA04' */ 0189 0x40, 0x0E, 0x82, 0x64, 0x00, 0x00, 0x00, 0x08, 0190 /* #1.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_05, value: 0x08, size: 4, comment: 'SEMC_DATA05' */ 0191 0x40, 0x0E, 0x82, 0x68, 0x00, 0x00, 0x00, 0x08, 0192 /* #1.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_06, value: 0x08, size: 4, comment: 'SEMC_DATA06' */ 0193 0x40, 0x0E, 0x82, 0x6C, 0x00, 0x00, 0x00, 0x08, 0194 /* #1.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_07, value: 0x08, size: 4, comment: 'SEMC_DATA07' */ 0195 0x40, 0x0E, 0x82, 0x70, 0x00, 0x00, 0x00, 0x08, 0196 /* #1.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_30, value: 0x08, size: 4, comment: 'SEMC_DATA08' */ 0197 0x40, 0x0E, 0x82, 0xCC, 0x00, 0x00, 0x00, 0x08, 0198 /* #1.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_31, value: 0x08, size: 4, comment: 'SEMC_DATA09' */ 0199 0x40, 0x0E, 0x82, 0xD0, 0x00, 0x00, 0x00, 0x08, 0200 /* #1.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_32, value: 0x08, size: 4, comment: 'SEMC_DATA10' */ 0201 0x40, 0x0E, 0x82, 0xD4, 0x00, 0x00, 0x00, 0x08, 0202 /* #1.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_33, value: 0x08, size: 4, comment: 'SEMC_DATA11' */ 0203 0x40, 0x0E, 0x82, 0xD8, 0x00, 0x00, 0x00, 0x08, 0204 /* #1.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_34, value: 0x08, size: 4, comment: 'SEMC_DATA12' */ 0205 0x40, 0x0E, 0x82, 0xDC, 0x00, 0x00, 0x00, 0x08, 0206 /* #1.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_35, value: 0x08, size: 4, comment: 'SEMC_DATA13' */ 0207 0x40, 0x0E, 0x82, 0xE0, 0x00, 0x00, 0x00, 0x08, 0208 /* #1.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_36, value: 0x08, size: 4, comment: 'SEMC_DATA14' */ 0209 0x40, 0x0E, 0x82, 0xE4, 0x00, 0x00, 0x00, 0x08, 0210 /* #1.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_37, value: 0x08, size: 4, comment: 'SEMC_DATA15' */ 0211 0x40, 0x0E, 0x82, 0xE8, 0x00, 0x00, 0x00, 0x08, 0212 /* #1.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_B1_39, value: 0x08, size: 4, comment: 'SEMC_DQS' */ 0213 0x40, 0x0E, 0x82, 0xF0, 0x00, 0x00, 0x00, 0x08, 0214 /* #1.82, command: write_value, address: SEMC_MCR, value: 0x1FFF0004, size: 4, comment: 'Default values from SEMC_GetDefaultConfig' */ 0215 0x40, 0x0D, 0x40, 0x00, 0x1F, 0xFF, 0x00, 0x04, 0216 /* #1.83, command: write_value, address: SEMC_BMCR0, value: 0x104085, size: 4, comment: 'Default values from SEMC_GetDefaultConfig' */ 0217 0x40, 0x0D, 0x40, 0x08, 0x00, 0x10, 0x40, 0x85, 0218 /* #1.84, command: write_value, address: SEMC_BMCR1, value: 0x40246085, size: 4, comment: 'Default values from SEMC_GetDefaultConfig' */ 0219 0x40, 0x0D, 0x40, 0x0C, 0x40, 0x24, 0x60, 0x85, 0220 /* #1.85, command: write_value, address: SEMC_BR0, value: 0x8000001D, size: 4, comment: 'CS0: Start add Address 0x80000000; Memsize 64MByte' */ 0221 0x40, 0x0D, 0x40, 0x10, 0x80, 0x00, 0x00, 0x1D, 0222 /* #1.86, command: write_value, address: SEMC_SDRAMCR0, value: 0xF35, size: 4, comment: 'PortSize 16; Burst Len 8; 9 Bit Column Addresses; CAS Latency 3' */ 0223 0x40, 0x0D, 0x40, 0x40, 0x00, 0x00, 0x0F, 0x35, 0224 /* #1.87, command: write_value, address: SEMC_SDRAMCR1, value: 0x00664B22, size: 4, comment: 'PRE2ACT: tRP = 18ns; ACT2RW: tRCD = 18ns; RFRC: tRFC=72ns; WRC: tWR=15ns; CKEOFF: tRAS_min = 42ns; ACT2PRE: tRAS_min = 42ns' */ 0225 0x40, 0x0D, 0x40, 0x44, 0x00, 0x66, 0x4B, 0x22, 0226 /* #1.88, command: write_value, address: SEMC_SDRAMCR2, value: 0x00090B13, size: 4, comment: 'SRCC: tXSR=120ns; REF2REF: tRFC=72ns; ACT2ACT: tRC=60ns' */ 0227 0x40, 0x0D, 0x40, 0x48, 0x00, 0x09, 0x0B, 0x13, 0228 /* #1.89, command: write_value, address: SEMC_SDRAMCR3, value: 0x8070A00, size: 4, comment: 'Default values from NXP examples for SEMC' */ 0229 0x40, 0x0D, 0x40, 0x4C, 0x08, 0x07, 0x0A, 0x00, 0230 /* #1.90, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ 0231 0x40, 0x0D, 0x40, 0x90, 0x80, 0x00, 0x00, 0x00, 0232 /* #1.91, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */ 0233 0x40, 0x0D, 0x40, 0x94, 0x00, 0x00, 0x00, 0x02, 0234 /* #1.92, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */ 0235 0x40, 0x0D, 0x40, 0x98, 0x00, 0x00, 0x00, 0x00, 0236 /* #1.93, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4, comment: 'IP Command: Precharge All' */ 0237 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0F, 0238 /* #2, command: nop */ 0239 0xC0, 0x00, 0x04, 0x00, 0240 /* #3, command: nop */ 0241 0xC0, 0x00, 0x04, 0x00, 0242 /* #4, command: nop */ 0243 0xC0, 0x00, 0x04, 0x00, 0244 /* #5, command: nop */ 0245 0xC0, 0x00, 0x04, 0x00, 0246 /* #6, command: nop */ 0247 0xC0, 0x00, 0x04, 0x00, 0248 /* #7.1-2, command header bytes for merged 'Write - value' command */ 0249 0xCC, 0x00, 0x14, 0x04, 0250 /* #7.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 0251 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 0252 /* #7.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4, comment: 'IP Command: Auto Refresh' */ 0253 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, 0254 /* #8, command: nop */ 0255 0xC0, 0x00, 0x04, 0x00, 0256 /* #9, command: nop */ 0257 0xC0, 0x00, 0x04, 0x00, 0258 /* #10, command: nop */ 0259 0xC0, 0x00, 0x04, 0x00, 0260 /* #11, command: nop */ 0261 0xC0, 0x00, 0x04, 0x00, 0262 /* #12, command: nop */ 0263 0xC0, 0x00, 0x04, 0x00, 0264 /* #13.1-2, command header bytes for merged 'Write - value' command */ 0265 0xCC, 0x00, 0x14, 0x04, 0266 /* #13.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 0267 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 0268 /* #13.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4, comment: 'IP Command: Precharge All' */ 0269 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, 0270 /* #14, command: nop */ 0271 0xC0, 0x00, 0x04, 0x00, 0272 /* #15, command: nop */ 0273 0xC0, 0x00, 0x04, 0x00, 0274 /* #16, command: nop */ 0275 0xC0, 0x00, 0x04, 0x00, 0276 /* #17, command: nop */ 0277 0xC0, 0x00, 0x04, 0x00, 0278 /* #18, command: nop */ 0279 0xC0, 0x00, 0x04, 0x00, 0280 /* #19.1-3, command header bytes for merged 'Write - value' command */ 0281 0xCC, 0x00, 0x1C, 0x04, 0282 /* #19.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 0283 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 0284 /* #19.2, command: write_value, address: SEMC_IPTXDAT, value: 0x33, size: 4, comment: 'Mode: BurstLen8; CAS Latency 3' */ 0285 0x40, 0x0D, 0x40, 0xA0, 0x00, 0x00, 0x00, 0x33, 0286 /* #19.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4, comment: 'IP Command: Mode Set' */ 0287 0x40, 0x0D, 0x40, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, 0288 /* #20, command: nop */ 0289 0xC0, 0x00, 0x04, 0x00, 0290 /* #21, command: nop */ 0291 0xC0, 0x00, 0x04, 0x00, 0292 /* #22, command: nop */ 0293 0xC0, 0x00, 0x04, 0x00, 0294 /* #23, command: nop */ 0295 0xC0, 0x00, 0x04, 0x00, 0296 /* #24, command: nop */ 0297 0xC0, 0x00, 0x04, 0x00, 0298 /* #25.1-2, command header bytes for merged 'Write - value' command */ 0299 0xCC, 0x00, 0x14, 0x04, 0300 /* #25.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */ 0301 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03, 0302 /* #25.2, command: write_value, address: SEMC_SDRAMCR3, value: 0x8070A01, size: 4, comment: 'Enable autorefresh. Otherwise same as above.' */ 0303 0x40, 0x0D, 0x40, 0x4C, 0x08, 0x07, 0x0A, 0x01 0304 }; 0305 /* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */ 0306 0307 #else 0308 const uint8_t dcd_data[] = {0x00}; 0309 #endif /* XIP_BOOT_HEADER_DCD_ENABLE */ 0310 #endif /* XIP_BOOT_HEADER_ENABLE */
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