csb337/start/bspstart.c

0001 /*
0002  * Cogent CSB337 - AT91RM9200 Startup Code
0003  *
0004  *  Copyright (c) 2004 by Cogent Computer Systems
0005  *  Written by Jay Monkman <jtm@lopingdog.com>
0006  *
0007  *  Modified by Joel Sherill
0008  *  from OAR Corporation and
0009  *  Fernando Nicodemos <fgnicodemos@terra.com.br>
0010  *  from NCB - Sistemas Embarcados Ltda. (Brazil)
0011  *
0012  *  The license and distribution terms for this file may be
0013  *  found in the file LICENSE in this distribution or at
0014  *  http://www.rtems.org/license/LICENSE.
0015  */
0016
0017 #include <bsp.h>
0018 #include <bsp/irq-generic.h>
0019 #include <at91rm9200.h>
0020 #include <at91rm9200_pmc.h>
0021 #include <at91rm9200_emac.h>
0022 #include <at91rm9200_gpio.h>
0023 #include <at91rm9200_usart.h>
0024
0025 /* Function prototypes */
0026 static void fix_mac_addr(void);
0027 void bsp_usart_init(void);
0028
0029 /*
0030  * bsp_start_default - BSP initialization function
0031  *
0032  * This function is called before RTEMS is initialized and used
0033  * adjust the kernel's configuration.
0034  *
0035  * This function also configures the CPU's memory protection unit.
0036  *
0037  * RESTRICTIONS/LIMITATIONS:
0038  *   Since RTEMS is not configured, no RTEMS functions can be called.
0039  */
0040 static void bsp_start_default( void )
0041 {
0042   /* disable interrupts */
0043   AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
0044
0045   /*
0046    * Some versions of the bootloader have the MAC address
0047    * reversed. This fixes it, if necessary.
0048    */
0049   fix_mac_addr();
0050
0051   /*
0052    * Init rtems PIO configuration for USARTs
0053    */
0054   bsp_usart_init();
0055
0056   /*
0057    * Init rtems interrupt management
0058    */
0059   bsp_interrupt_initialize();
0060
0061 } /* bsp_start */
0062
0063 /*
0064  * Some versions of the bootloader shipped with the CSB337
0065  * reverse the MAC address. This function tests for that,
0066  * and fixes the MAC address.
0067  */
0068 static void fix_mac_addr(void)
0069 {
0070   uint8_t addr[6];
0071
0072   /* Read the MAC address */
0073   addr[0] = (EMAC_REG(EMAC_SA1L) >>  0) & 0xff;
0074   addr[1] = (EMAC_REG(EMAC_SA1L) >>  8) & 0xff;
0075   addr[2] = (EMAC_REG(EMAC_SA1L) >> 16) & 0xff;
0076   addr[3] = (EMAC_REG(EMAC_SA1L) >> 24) & 0xff;
0077   addr[4] = (EMAC_REG(EMAC_SA1H) >>  0) & 0xff;
0078   addr[5] = (EMAC_REG(EMAC_SA1H) >>  8) & 0xff;
0079
0080   /* Check which 3 bytes have Cogent's OUI */
0081   if ((addr[5] == 0x00) && (addr[4] == 0x23) && (addr[3] == 0x31)) {
0082       EMAC_REG(EMAC_SA1L) = ((addr[5] <<  0) |
0083                              (addr[4] <<  8) |
0084                              (addr[3] << 16) |
0085                              (addr[2] << 24));
0086
0087       EMAC_REG(EMAC_SA1H) = ((addr[1] <<  0) |
0088                              (addr[0] <<  8));
0089   }
0090 }
0091
0092 /*
0093  *
0094  * NAME: bsp_usart_init - Function to setup the PIO in USART mode
0095  *       before startup
0096  *
0097  * DESCRIPTION:
0098  *   This function is called before usart driver is initialized and is
0099  *   used to setup the proper mode of PIO operation for USART.
0100  *
0101  * NOTES:
0102  *   The initialization could be done smarter by programming only the
0103  *   bits you need to program for each USART when the port is ENABLED.
0104  *
0105  */
0106 void bsp_usart_init(void)
0107 {
0108   /*
0109    * Configure shared pins for USARTs.
0110    * Disables the PIO from controlling the corresponding pin.
0111    */
0112   PIOA_REG(PIO_PDR) |= ( BIT5  |   /* USART3 TXD3  */
0113                          BIT6  |   /* USART3 RXD3  */
0114                          BIT17 |   /* USART0 TXD0  */
0115                          BIT18 |   /* USART0 RXD0  */
0116                          BIT22 |   /* USART2 RXD2  */
0117                          BIT23 );  /* USART2 TXD2  */
0118
0119   PIOB_REG(PIO_PDR) |= ( BIT20 |   /* USART1 TXD1  */
0120                          BIT21 );  /* USART1 RXD1  */
0121
0122   /**** PIO Controller A - Pins you want in mode B ****/
0123   PIOA_REG(PIO_BSR) |=  ( BIT5 |   /* USART3 TXD3  */ /* add */
0124                           BIT6 );  /* USART3 RXD3  */
0125   PIOA_REG(PIO_ASR) &= ~( BIT5 |   /* USART3 TXD3  */
0126                           BIT6 );  /* USART3 RXD3  */
0127
0128   /**** PIO Controller A - Pins you want in mode A ****/
0129   PIOA_REG(PIO_ASR) |=  ( BIT17 |   /* USART0 TXD0  */
0130                           BIT18 |   /* USART0 RXD0  */
0131                           BIT22 |   /* USART2 RXD2  */
0132                           BIT23 );  /* USART2 TXD2  */
0133   PIOA_REG(PIO_BSR) &= ~( BIT17 |   /* USART0 TXD0  */ /* add */
0134                           BIT18 |   /* USART0 RXD0  */
0135                           BIT22 |   /* USART2 RXD2  */
0136                           BIT23 );  /* USART2 TXD2  */
0137
0138   /**** PIO Controller B - Pins you want in mode A ****/
0139   PIOB_REG(PIO_ASR) |=  ( BIT20 |   /* USART1 TXD1  */
0140                           BIT21 );  /* USART1 RXD1  */
0141   PIOB_REG(PIO_BSR) &= ~( BIT20 |   /* USART1 TXD1  */
0142                           BIT21 );  /* USART1 RXD1  */
0143
0144   /**** PIO Controller B - Pins you want in mode B ****/
0145   /**** none ****/
0146
0147   /* Enable the clock to the USARTs */
0148   PMC_REG(PMC_PCER) |= ( PMC_PCR_PID_US0 |   /* USART 0 Peripheral Clock */
0149                          PMC_PCR_PID_US1 |   /* USART 1 Peripheral Clock */
0150                          PMC_PCR_PID_US2 |   /* USART 2 Peripheral Clock */
0151                          PMC_PCR_PID_US3 );  /* USART 3 Peripheral Clock */
0152 }
0153
0154 /*
0155  *  By making this a weak alias for bsp_start_default, a brave soul
0156  *  can override the actual bsp_start routine used.
0157  */
0158 void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));