include/bsp/irq.h

0001 /**
0002  * @file
0003  *
0004  * @ingroup csb337_interrupt
0005  *
0006  * @brief Interrupt Support.
0007  */
0008
0009 /*
0010  * Interrupt handler Header file
0011  *
0012  * Copyright (c) 2010 embedded brains GmbH & Co. KG
0013  *
0014  * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
0015  *
0016  *  The license and distribution terms for this file may be
0017  *  found in the file LICENSE in this distribution or at
0018  *  http://www.rtems.org/license/LICENSE.
0019  */
0020
0021 #ifndef __IRQ_H__
0022 #define __IRQ_H__
0023
0024 #ifndef __asm__
0025
0026 #include <rtems.h>
0027 #include <rtems/irq.h>
0028 #include <rtems/irq-extension.h>
0029
0030 #endif /* __asm__ */
0031
0032 /**
0033  * @defgroup csb337_interrupt Interrrupt Support
0034  *
0035  * @ingroup RTEMSBSPsARMCSB337
0036  *
0037  * @brief Interrupt Support.
0038  */
0039
0040 /* possible interrupt sources on the AT91RM9200 */
0041 #define AT91RM9200_INT_FIQ        0
0042 #define AT91RM9200_INT_SYSIRQ     1
0043 #define AT91RM9200_INT_PIOA       2
0044 #define AT91RM9200_INT_PIOB       3
0045 #define AT91RM9200_INT_PIOC       4
0046 #define AT91RM9200_INT_PIOD       5
0047 #define AT91RM9200_INT_US0        6
0048 #define AT91RM9200_INT_US1        7
0049 #define AT91RM9200_INT_US2        8
0050 #define AT91RM9200_INT_US3        9
0051 #define AT91RM9200_INT_MCI       10
0052 #define AT91RM9200_INT_UDP       11
0053 #define AT91RM9200_INT_TWI       12
0054 #define AT91RM9200_INT_SPI       13
0055 #define AT91RM9200_INT_SSC0      14
0056 #define AT91RM9200_INT_SSC1      15
0057 #define AT91RM9200_INT_SSC2      16
0058 #define AT91RM9200_INT_TC0       17
0059 #define AT91RM9200_INT_TC1       18
0060 #define AT91RM9200_INT_TC2       19
0061 #define AT91RM9200_INT_TC3       20
0062 #define AT91RM9200_INT_TC4       21
0063 #define AT91RM9200_INT_TC5       22
0064 #define AT91RM9200_INT_UHP       23
0065 #define AT91RM9200_INT_EMAC      24
0066 #define AT91RM9200_INT_IRQ0      25
0067 #define AT91RM9200_INT_IRQ1      26
0068 #define AT91RM9200_INT_IRQ2      27
0069 #define AT91RM9200_INT_IRQ3      28
0070 #define AT91RM9200_INT_IRQ4      28
0071 #define AT91RM9200_INT_IRQ5      30
0072 #define AT91RM9200_INT_IRQ6      31
0073 #define AT91RM9200_MAX_INT       32
0074
0075 #define BSP_INTERRUPT_VECTOR_COUNT AT91RM9200_MAX_INT
0076
0077 #endif /* __IRQ_H__ */