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File indexing completed on 2025-05-11 08:22:48

0001 /*
0002  * Copyright (c) 2014 Ben Gras <beng@shrike-systems.com>. All rights reserved.
0003  *
0004  * The license and distribution terms for this file may be
0005  * found in the file LICENSE in this distribution or at
0006  * http://www.rtems.org/license/LICENSE.
0007  */
0008 
0009 #include <bsp.h>
0010 #include <bsp/bootcard.h>
0011 
0012 #define AM335X_CM_BASE 0x44E00000
0013 #define AM335X_CM_SIZE 0x1000
0014 
0015 #define AM335X_PRM_DEVICE_OFFSET 0xf00
0016 #define AM335X_PRM_RSTCTRL_REG 0x00
0017 #define AM335X_RST_GLOBAL_WARM_SW_BIT 0
0018 
0019 #define DM37XX_CM_BASE 0x48307000
0020 #define DM37XX_CM_SIZE 0x1000
0021 #define DM37XX_PRM_RSTCTRL_REG 0x250
0022 #define DM37XX_RST_DPLL3_BIT 2
0023 
0024 void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
0025 {
0026 #if IS_DM3730
0027   static uint32_t reset_base = DM37XX_CM_BASE;
0028   while (true) {
0029     mmio_set((reset_base + DM37XX_PRM_RSTCTRL_REG),
0030              (1 << DM37XX_RST_DPLL3_BIT));
0031   }
0032 #endif
0033 
0034 #if IS_AM335X
0035   static uint32_t reset_base = AM335X_CM_BASE;
0036   while (true) {
0037     mmio_set((reset_base + AM335X_PRM_DEVICE_OFFSET +
0038               AM335X_PRM_RSTCTRL_REG),
0039              (1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
0040   }
0041 #endif
0042 
0043   (void) source;
0044   (void) code;
0045 }