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0030 #ifndef _COMPILER_H_
0031 #define _COMPILER_H_
0032
0033 #ifdef __rtems__
0034 #include <bspopts.h>
0035 #endif
0036
0037
0038
0039 #if defined __SAMV71J19__ \
0040 || defined __SAMV71J20__ \
0041 || defined __SAMV71J21__ \
0042 || defined __SAMV71N19__ \
0043 || defined __SAMV71N20__ \
0044 || defined __SAMV71N21__ \
0045 || defined __SAMV71Q19__ \
0046 || defined __SAMV71Q20__ \
0047 || defined __SAMV71Q21__
0048 #include "include/samv71/samv71.h"
0049 #elif defined __SAMS70J19__ \
0050 || defined __SAMS70J20__ \
0051 || defined __SAMS70J21__ \
0052 || defined __SAMS70N19__ \
0053 || defined __SAMS70N20__ \
0054 || defined __SAMS70N21__ \
0055 || defined __SAMS70Q19__ \
0056 || defined __SAMS70Q20__ \
0057 || defined __SAMS70Q21__
0058 #include "include/sams70/sams70.h"
0059 #elif defined __SAME70J19__ \
0060 || defined __SAME70J20__ \
0061 || defined __SAME70J21__ \
0062 || defined __SAME70N19__ \
0063 || defined __SAME70N20__ \
0064 || defined __SAME70N21__ \
0065 || defined __SAME70Q19__ \
0066 || defined __SAME70Q20__ \
0067 || defined __SAME70Q21__
0068 #include "include/same70/same70.h"
0069 #else
0070 #error "please define correct macro for the chip first!"
0071 #endif
0072
0073
0074
0075
0076 #ifndef __ASSEMBLY__
0077
0078 #include <stddef.h>
0079 #include <stdlib.h>
0080 #include <stdbool.h>
0081 #include <stdint.h>
0082
0083
0084 #if defined (__CC_ARM)
0085 #define WEAK __attribute__ ((weak))
0086 #elif defined (__ICCARM__)
0087 #define WEAK __weak
0088 #elif defined (__GNUC__)
0089 #define WEAK __attribute__ ((weak))
0090 #endif
0091
0092
0093 #if defined (__CC_ARM)
0094 #define COMPILER_NAME "KEIL"
0095 #elif defined (__ICCARM__)
0096 #define COMPILER_NAME "IAR"
0097 #elif defined (__GNUC__)
0098 #define COMPILER_NAME "GCC"
0099 #endif
0100
0101
0102 #if defined (__CC_ARM)
0103 #define NO_INIT
0104 #elif defined (__ICCARM__)
0105 #define NO_INIT __no_init
0106 #elif defined (__GNUC__)
0107 #define NO_INIT
0108 #endif
0109
0110
0111
0112 #if defined (__CC_ARM)
0113 #define memory_sync() __dsb(15);__isb(15);
0114 #elif defined (__ICCARM__)
0115 #define memory_sync() __DSB();__ISB();
0116 #elif defined (__GNUC__)
0117 #define memory_sync() __DSB();__ISB();
0118 #endif
0119
0120
0121 #if defined (__CC_ARM)
0122 #define memory_barrier() __dmb(15);
0123 #elif defined (__ICCARM__)
0124 #define memory_barrier() __DMB();
0125 #elif defined (__GNUC__)
0126 #define memory_barrier() __DMB();
0127 #endif
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0140 #define TPASTE2(a, b) a##b
0141 #define TPASTE3(a, b, c) a##b##c
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0154 #define ATPASTE2(a, b) TPASTE2(a, b)
0155 #define ATPASTE3(a, b, c) TPASTE3(a, b, c)
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0165 #define COMPILER_PRAGMA(arg) _Pragma(#arg)
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0172 #define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment))
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0179 #define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack())
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0185 #if defined (__CC_ARM)
0186 #define COMPILER_SECTION(a) __attribute__((__section__(a)))
0187 #elif defined (__ICCARM__)
0188 #define COMPILER_SECTION(a) COMPILER_PRAGMA(location = a)
0189 #elif defined (__GNUC__)
0190 #define COMPILER_SECTION(a) __attribute__((__section__(a)))
0191 #endif
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0194
0195
0196 #if defined (__CC_ARM)
0197 #define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
0198 #elif defined (__ICCARM__)
0199 #define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a)
0200 #elif defined (__GNUC__)
0201 #define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
0202 #endif
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0208 #if defined (__CC_ARM)
0209 #define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4)))
0210 #elif defined (__ICCARM__)
0211 #define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 4)
0212 #elif defined (__GNUC__)
0213 #define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4)))
0214 #endif
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0239 #define Abs(a) (((a) < 0) ? -(a) : (a))
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0250 #define Min(a, b) (((a) < (b)) ? (a) : (b))
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0261 #define Max(a, b) (((a) > (b)) ? (a) : (b))
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0274 #define min(a, b) Min(a, b)
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0285 #define max(a, b) Max(a, b)
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0289 #define be32_to_cpu(x) __REV(x)
0290 #define cpu_to_be32(x) __REV(x)
0291 #define BE32_TO_CPU(x) __REV(x)
0292 #define CPU_TO_BE32(x) __REV(x)
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0298 #define UNUSED(v) (void)(v)
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0321 # define irq_initialize_vectors() \
0322 do { \
0323 } while (0)
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0342 # define irq_register_handler(int_num, int_prio) \
0343 NVIC_ClearPendingIRQ((IRQn_Type)int_num); \
0344 NVIC_SetPriority((IRQn_Type)int_num, int_prio); \
0345 NVIC_EnableIRQ((IRQn_Type)int_num); \
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0350 # define cpu_irq_enable() \
0351 do { \
0352 \
0353 __DMB(); \
0354 __enable_irq(); \
0355 } while (0)
0356 # define cpu_irq_disable() \
0357 do { \
0358 __disable_irq(); \
0359 __DMB(); \
0360 \
0361 } while (0)
0362
0363 typedef uint32_t irqflags_t;
0364
0365 #if !defined(__DOXYGEN__)
0366 extern volatile bool g_interrupt_enabled;
0367 #endif
0368
0369 #define cpu_irq_is_enabled() (__get_PRIMASK() == 0)
0370
0371 static volatile uint32_t cpu_irq_critical_section_counter;
0372 static volatile bool cpu_irq_prev_interrupt_state;
0373
0374 static inline irqflags_t cpu_irq_save(void)
0375 {
0376 irqflags_t flags = cpu_irq_is_enabled();
0377 cpu_irq_disable();
0378 return flags;
0379 }
0380
0381 static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
0382 {
0383 return (flags);
0384 }
0385
0386 static inline void cpu_irq_restore(irqflags_t flags)
0387 {
0388 if (cpu_irq_is_enabled_flags(flags))
0389 cpu_irq_enable();
0390 }
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0400 #define Enable_global_interrupt() cpu_irq_enable()
0401 #define Disable_global_interrupt() cpu_irq_disable()
0402 #define Is_global_interrupt_enabled() cpu_irq_is_enabled()
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0410 #define DISABLE 0
0411 #define ENABLE 1
0412 #define DISABLED 0
0413 #define ENABLED 1
0414 #define OFF 0
0415 #define ON 1
0416 #define FALSE 0
0417 #define TRUE 1
0418 #ifndef __cplusplus
0419 #if !defined(__bool_true_false_are_defined)
0420 #define false FALSE
0421 #define true TRUE
0422 #endif
0423 #endif
0424 #define KO 0
0425 #define OK 1
0426 #define PASS 0
0427 #define FAIL 1
0428 #define LOW 0
0429 #define HIGH 1
0430 #define CLR 0
0431 #define SET 1
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0440 #define ctz(u) ((u) & (1ul << 0) ? 0 : \
0441 (u) & (1ul << 1) ? 1 : \
0442 (u) & (1ul << 2) ? 2 : \
0443 (u) & (1ul << 3) ? 3 : \
0444 (u) & (1ul << 4) ? 4 : \
0445 (u) & (1ul << 5) ? 5 : \
0446 (u) & (1ul << 6) ? 6 : \
0447 (u) & (1ul << 7) ? 7 : \
0448 (u) & (1ul << 8) ? 8 : \
0449 (u) & (1ul << 9) ? 9 : \
0450 (u) & (1ul << 10) ? 10 : \
0451 (u) & (1ul << 11) ? 11 : \
0452 (u) & (1ul << 12) ? 12 : \
0453 (u) & (1ul << 13) ? 13 : \
0454 (u) & (1ul << 14) ? 14 : \
0455 (u) & (1ul << 15) ? 15 : \
0456 (u) & (1ul << 16) ? 16 : \
0457 (u) & (1ul << 17) ? 17 : \
0458 (u) & (1ul << 18) ? 18 : \
0459 (u) & (1ul << 19) ? 19 : \
0460 (u) & (1ul << 20) ? 20 : \
0461 (u) & (1ul << 21) ? 21 : \
0462 (u) & (1ul << 22) ? 22 : \
0463 (u) & (1ul << 23) ? 23 : \
0464 (u) & (1ul << 24) ? 24 : \
0465 (u) & (1ul << 25) ? 25 : \
0466 (u) & (1ul << 26) ? 26 : \
0467 (u) & (1ul << 27) ? 27 : \
0468 (u) & (1ul << 28) ? 28 : \
0469 (u) & (1ul << 29) ? 29 : \
0470 (u) & (1ul << 30) ? 30 : \
0471 (u) & (1ul << 31) ? 31 : \
0472 32)
0473
0474 #endif
0475
0476 #endif