include/libchip/chip.h

0001 /* ---------------------------------------------------------------------------- */
0002 /*                  Atmel Microcontroller Software Support                      */
0003 /*                       SAM Software Package License                           */
0004 /* ---------------------------------------------------------------------------- */
0005 /* Copyright (c) 2015, Atmel Corporation                                        */
0006 /*                                                                              */
0007 /* All rights reserved.                                                         */
0008 /*                                                                              */
0009 /* Redistribution and use in source and binary forms, with or without           */
0010 /* modification, are permitted provided that the following condition is met:    */
0011 /*                                                                              */
0012 /* - Redistributions of source code must retain the above copyright notice,     */
0013 /* this list of conditions and the disclaimer below.                            */
0014 /*                                                                              */
0015 /* Atmel's name may not be used to endorse or promote products derived from     */
0016 /* this software without specific prior written permission.                     */
0017 /*                                                                              */
0018 /* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
0019 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
0020 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
0021 /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
0022 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
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0026 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
0027 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
0028 /* ---------------------------------------------------------------------------- */
0029
0030 #ifndef SAMS7_CHIP_H
0031 #define SAMS7_CHIP_H
0032
0033 #include "compiler.h"
0034
0035
0036 /*************************************************
0037  *      Memory type and its attribute
0038  *************************************************/
0039 #define SHAREABLE       1
0040 #define NON_SHAREABLE   0
0041 /*********************************************************************************************************************************************************************
0042 *   Memory Type Definition                          Memory TEX attribute            C attribute                     B attribute                     S attribute
0043 **********************************************************************************************************************************************************************/
0044
0045 #define STRONGLY_ORDERED_SHAREABLE_TYPE      ((0x00 << MPU_RASR_TEX_Pos) | (DISABLE << MPU_RASR_C_Pos) | (DISABLE << MPU_RASR_B_Pos))     // DO not care //
0046 #define SHAREABLE_DEVICE_TYPE                ((0x00 << MPU_RASR_TEX_Pos) | (DISABLE << MPU_RASR_C_Pos) | (ENABLE  << MPU_RASR_B_Pos))     // DO not care //
0047 #define INNER_OUTER_NORMAL_WT_NWA_TYPE(x)   ((0x00 << MPU_RASR_TEX_Pos) | (ENABLE  << MPU_RASR_C_Pos) | (DISABLE << MPU_RASR_B_Pos) | (x << MPU_RASR_S_Pos))
0048 #define INNER_OUTER_NORMAL_WB_NWA_TYPE(x)   ((0x00 << MPU_RASR_TEX_Pos) | (ENABLE  << MPU_RASR_C_Pos) | (ENABLE  << MPU_RASR_B_Pos) | (x << MPU_RASR_S_Pos))
0049 #define INNER_OUTER_NORMAL_NOCACHE_TYPE(x)  ((0x01 << MPU_RASR_TEX_Pos) | (DISABLE << MPU_RASR_C_Pos) | (DISABLE << MPU_RASR_B_Pos) | (x << MPU_RASR_S_Pos))
0050 #define INNER_OUTER_NORMAL_WB_RWA_TYPE(x)   ((0x01 << MPU_RASR_TEX_Pos) | (ENABLE  << MPU_RASR_C_Pos) | (ENABLE  << MPU_RASR_B_Pos) | (x << MPU_RASR_S_Pos))
0051 #define NON_SHAREABLE_DEVICE_TYPE            ((0x02 << MPU_RASR_TEX_Pos) | (DISABLE << MPU_RASR_C_Pos) | (DISABLE << MPU_RASR_B_Pos))     // DO not care //
0052
0053 /*  Normal memory attributes with outer capability rules to Non_Cacable */
0054
0055 #define INNER_NORMAL_NOCACHE_TYPE(x)  ((0x04 << MPU_RASR_TEX_Pos) | (DISABLE  << MPU_RASR_C_Pos) | (DISABLE  << MPU_RASR_B_Pos) | (x << MPU_RASR_S_Pos))
0056 #define INNER_NORMAL_WB_RWA_TYPE(x)   ((0x04 << MPU_RASR_TEX_Pos) | (DISABLE  << MPU_RASR_C_Pos) | (ENABLE  << MPU_RASR_B_Pos)  | (x << MPU_RASR_S_Pos))
0057 #define INNER_NORMAL_WT_NWA_TYPE(x)   ((0x04 << MPU_RASR_TEX_Pos) | (ENABLE  << MPU_RASR_C_Pos)  | (DISABLE  << MPU_RASR_B_Pos) | (x << MPU_RASR_S_Pos))
0058 #define INNER_NORMAL_WB_NWA_TYPE(x)   ((0x04 << MPU_RASR_TEX_Pos) | (ENABLE  << MPU_RASR_C_Pos)  | (ENABLE  << MPU_RASR_B_Pos)  | (x << MPU_RASR_S_Pos))
0059
0060 /* SCB Interrupt Control State Register Definitions */
0061 #ifndef SCB_VTOR_TBLBASE_Pos
0062     #define SCB_VTOR_TBLBASE_Pos               29                                             /*!< SCB VTOR: TBLBASE Position */
0063     #define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
0064 #endif
0065
0066
0067 /*
0068  * Peripherals
0069  */
0070 #include "include/acc.h"
0071 #include "include/aes.h"
0072 #include "include/afec.h"
0073 #include "include/efc.h"
0074 #include "include/pio.h"
0075 #include "include/pio_it.h"
0076 #include "include/efc.h"
0077 #include "include/rstc.h"
0078 #include "include/mpu.h"
0079 #include "include/gmac.h"
0080 #include "include/gmacd.h"
0081 #include "include/video.h"
0082 #include "include/icm.h"
0083 #include "include/isi.h"
0084 #include "include/exceptions.h"
0085 #include "include/pio_capture.h"
0086 #include "include/rtc.h"
0087 #include "include/rtt.h"
0088 #include "include/tc.h"
0089 #include "include/timetick.h"
0090 #include "include/twi.h"
0091 #include "include/flashd.h"
0092 #include "include/pmc.h"
0093 #include "include/pwmc.h"
0094 #include "include/mcan.h"
0095 #include "include/supc.h"
0096 #include "include/usart.h"
0097 #include "include/uart.h"
0098 #include "include/isi.h"
0099 #include "include/hsmci.h"
0100 #include "include/ssc.h"
0101 #include "include/twi.h"
0102 #include "include/trng.h"
0103 #include "include/wdt.h"
0104 #include "include/spi.h"
0105 #include "include/qspi.h"
0106 #include "include/trace.h"
0107 #include "include/xdmac.h"
0108 #include "include/xdma_hardware_interface.h"
0109 #include "include/xdmad.h"
0110 #include "include/mcid.h"
0111 #include "include/twid.h"
0112 #include "include/spi_dma.h"
0113 #include "include/qspi_dma.h"
0114 #include "include/uart_dma.h"
0115 #include "include/usart_dma.h"
0116 #include "include/twid.h"
0117 #include "include/afe_dma.h"
0118 #include "include/dac_dma.h"
0119 #include "include/usbhs.h"
0120
0121 #define ENABLE_PERIPHERAL(dwId)         PMC_EnablePeripheral(dwId)
0122 #define DISABLE_PERIPHERAL(dwId)        PMC_DisablePeripheral(dwId)
0123
0124 #endif /* SAMS7_CHIP_H */