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File indexing completed on 2025-05-11 08:22:45
0001 /* ---------------------------------------------------------------------------- 0002 * SAM Software Package License 0003 * ---------------------------------------------------------------------------- 0004 * Copyright (c) 2014, Atmel Corporation 0005 * 0006 * All rights reserved. 0007 * 0008 * Redistribution and use in source and binary forms, with or without 0009 * modification, are permitted provided that the following conditions are met: 0010 * 0011 * - Redistributions of source code must retain the above copyright notice, 0012 * this list of conditions and the disclaimer below. 0013 * 0014 * Atmel's name may not be used to endorse or promote products derived from 0015 * this software without specific prior written permission. 0016 * 0017 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR 0018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 0019 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 0020 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, 0021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 0022 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 0023 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 0024 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 0025 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 0026 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 0027 * ---------------------------------------------------------------------------- 0028 */ 0029 0030 #ifndef UTILITY_H 0031 #define UTILITY_H 0032 0033 #include "chip.h" 0034 0035 0036 0037 #define RESET_CYCLE_COUNTER() do { \ 0038 CoreDebug->DEMCR = CoreDebug_DEMCR_TRCENA_Msk; \ 0039 __DSB(); DWT->LAR = 0xC5ACCE55; __DSB(); \ 0040 DWT->CTRL &= ~DWT_CTRL_CYCCNTENA_Msk; \ 0041 DWT->CYCCNT = 0; \ 0042 DWT->CTRL = DWT_CTRL_CYCCNTENA_Msk; \ 0043 }while(0) 0044 0045 #define GET_CYCLE_COUNTER(x) x=DWT->CYCCNT; 0046 0047 #define LockMutex(mut, timeout) get_lock(&mut, 1, &timeout) 0048 0049 #define ReleaseMutex(mut) free_lock(&mut) 0050 0051 #define GetResource(mut, max, timeout) get_lock(&mut, max, &timeout) 0052 0053 #define FreeResource(mut) free_lock(&mut) 0054 0055 0056 __STATIC_INLINE uint8_t Is_LockFree(volatile uint8_t *Lock_Variable) 0057 { 0058 /* return Variable value*/ 0059 return __LDREXB(Lock_Variable); 0060 0061 } 0062 0063 __STATIC_INLINE uint8_t get_lock(volatile uint8_t *Lock_Variable, const uint8_t maxValue, volatile uint32_t *pTimeout) 0064 { 0065 while (*pTimeout) 0066 { 0067 if(__LDREXB(Lock_Variable) < maxValue) 0068 { 0069 /* Set the Variable */ 0070 while( __STREXB(((*Lock_Variable) + 1), Lock_Variable) ) 0071 { 0072 if(!(*pTimeout)--) 0073 { 0074 return 1; // quit if timeout 0075 } 0076 } 0077 /* Memory access barrier */ 0078 __DMB(); 0079 TRACE_DEBUG("Mutex locked "); 0080 return 0; 0081 } 0082 0083 ((*pTimeout)--); 0084 } 0085 return 1; 0086 } 0087 0088 0089 0090 __STATIC_INLINE uint8_t free_lock(volatile uint8_t *Lock_Variable) 0091 { 0092 /* Memory access barrier Ensure memory operations completed before releasing lock */ 0093 __DSB(); 0094 if(__LDREXB(Lock_Variable)) 0095 { 0096 __STREXB( ((*Lock_Variable) - 1), Lock_Variable); 0097 TRACE_DEBUG("Mutex freed "); 0098 __DSB(); 0099 __DMB(); // Ensure memory operations completed before 0100 return 0; 0101 } 0102 else 0103 { 0104 return 1; 0105 } 0106 0107 0108 } 0109 0110 0111 #endif /* UTILITY_H */
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