libboard/include/s25fl1.h

0001 /* ---------------------------------------------------------------------------- */
0002 /*                  Atmel Microcontroller Software Support                      */
0003 /*                       SAM Software Package License                           */
0004 /* ---------------------------------------------------------------------------- */
0005 /* Copyright (c) 2015, Atmel Corporation                                        */
0006 /*                                                                              */
0007 /* All rights reserved.                                                         */
0008 /*                                                                              */
0009 /* Redistribution and use in source and binary forms, with or without           */
0010 /* modification, are permitted provided that the following condition is met:    */
0011 /*                                                                              */
0012 /* - Redistributions of source code must retain the above copyright notice,     */
0013 /* this list of conditions and the disclaimer below.                            */
0014 /*                                                                              */
0015 /* Atmel's name may not be used to endorse or promote products derived from     */
0016 /* this software without specific prior written permission.                     */
0017 /*                                                                              */
0018 /* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
0019 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
0020 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
0021 /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
0022 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
0023 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
0024 /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
0025 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
0026 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
0027 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
0028 /* ---------------------------------------------------------------------------- */
0029
0030 /**
0031  * \file
0032  *
0033  * Interface for the S25fl1 Serial Flash driver.
0034  *
0035  */
0036
0037 #ifndef S25FL1_H
0038 #define S25FL1_H
0039 #define USE_QSPI_DMA
0040 /*----------------------------------------------------------------------------
0041  *        Macros
0042  *----------------------------------------------------------------------------*/
0043
0044 #define Size(pAt25)            ((pAt25)->pDesc->size)
0045 #define PageSize(pAt25)        ((pAt25)->pDesc->pageSize)
0046 #define BlockSize(pAt25)       ((pAt25)->pDesc->blockSize)
0047 #define Name(pAt25)            ((pAt25)->pDesc->name)
0048 #define ManId(pAt25)           (((pAt25)->pDesc->jedecId) & 0xFF)
0049 #define PageNumber(pAt25)      (Size(pAt25) / PageSize(pAt25))
0050 #define BlockNumber(pAt25)     (Size(pAt25) / BlockSize(pAt25))
0051 #define PagePerBlock(pAt25)    (BlockSize(pAt25) / PageSize(pAt25))
0052 #define BlockEraseCmd(pAt25)   ((pAt25)->pDesc->blockEraseCmd)
0053
0054 /*----------------------------------------------------------------------------
0055  *        Local definitions
0056  *----------------------------------------------------------------------------*/
0057
0058 /** Device is protected, operation cannot be carried out. */
0059 #define ERROR_PROTECTED        1
0060 /** Device is busy executing a command. */
0061 #define ERROR_BUSY             2
0062 /** There was a problem while trying to program page data. */
0063 #define ERROR_PROGRAM          3
0064 /** There was an SPI communication error. */
0065 #define ERROR_SPI              4
0066
0067 /** Device ready/busy status bit. */
0068 #define STATUS_RDYBSY          (1 << 0)
0069 /** Device is ready. */
0070 #define STATUS_RDYBSY_READY    (0 << 0)
0071 /** Device is busy with internal operations. */
0072 #define STATUS_RDYBSY_BUSY     (1 << 0)
0073 /** Write enable latch status bit. */
0074 #define STATUS_WEL             (1 << 1)
0075 /** Device is not write enabled. */
0076 #define STATUS_WEL_DISABLED    (0 << 1)
0077 /** Device is write enabled. */
0078 #define STATUS_WEL_ENABLED     (1 << 1)
0079 /** Software protection status bit-field. */
0080 #define STATUS_SWP             (3 << 2)
0081 /** All sectors are software protected. */
0082 #define STATUS_SWP_PROTALL     (3 << 2)
0083 /** Some sectors are software protected. */
0084 #define STATUS_SWP_PROTSOME    (1 << 2)
0085 /** No sector is software protected. */
0086 #define STATUS_SWP_PROTNONE    (0 << 2)
0087 /** Write protect pin status bit. */
0088 #define STATUS_WPP             (1 << 4)
0089 /** Write protect signal is not asserted. */
0090 #define STATUS_WPP_NOTASSERTED (0 << 4)
0091 /** Write protect signal is asserted. */
0092 #define STATUS_WPP_ASSERTED    (1 << 4)
0093 /** Erase/program error bit. */
0094 #define STATUS_EPE             (1 << 5)
0095 /** Erase or program operation was successful. */
0096 #define STATUS_EPE_SUCCESS     (0 << 5)
0097 /** Erase or program error detected. */
0098 #define STATUS_EPE_ERROR       (1 << 5)
0099 /** Sector protection registers locked bit. */
0100 #define STATUS_SPRL            (1 << 7)
0101 /** Sector protection registers are unlocked. */
0102 #define STATUS_SPRL_UNLOCKED   (0 << 7)
0103 /** Sector protection registers are locked. */
0104 #define STATUS_SPRL_LOCKED     (1 << 7)
0105
0106 /** Quad enable bit */
0107 #define STATUS_QUAD_ENABLE     (1 << 1)
0108 /** Quad enable bit */
0109 #define STATUS_WRAP_ENABLE     (0 << 4)
0110
0111 /** Latency control bits */
0112 #define STATUS_LATENCY_CTRL    (0xF << 0)
0113
0114 #define STATUS_WRAP_BYTE       (1 << 5)
0115
0116 #define BLOCK_PROTECT_Msk      (7 << 2)
0117
0118 #define TOP_BTM_PROTECT_Msk    (1 << 5)
0119
0120 #define SEC_PROTECT_Msk        (1 << 6)
0121
0122 #define CHIP_PROTECT_Msk       (0x1F << 2)
0123
0124 /** Read array command code. */
0125 #define READ_ARRAY             0x0B
0126 /** Read array (low frequency) command code. */
0127 #define READ_ARRAY_LF          0x03
0128 /** Fast Read array  command code. */
0129 #define READ_ARRAY_DUAL        0x3B
0130 /** Fast Read array  command code. */
0131 #define READ_ARRAY_QUAD        0x6B
0132 /** Fast Read array  command code. */
0133 #define READ_ARRAY_DUAL_IO     0xBB
0134 /** Fast Read array  command code. */
0135 #define READ_ARRAY_QUAD_IO     0xEB
0136 /** Block erase command code (4K block). */
0137 #define BLOCK_ERASE_4K         0x20
0138 /** Block erase command code (32K block). */
0139 #define BLOCK_ERASE_32K        0x52
0140 /** Block erase command code (64K block). */
0141 #define BLOCK_ERASE_64K        0xD8
0142 /** Chip erase command code 1. */
0143 #define CHIP_ERASE_1           0x60
0144 /** Chip erase command code 2. */
0145 #define CHIP_ERASE_2           0xC7
0146 /** Byte/page program command code. */
0147 #define BYTE_PAGE_PROGRAM      0x02
0148 /** Sequential program mode command code 1. */
0149 #define SEQUENTIAL_PROGRAM_1   0xAD
0150 /** Sequential program mode command code 2. */
0151 #define SEQUENTIAL_PROGRAM_2   0xAF
0152 /** Write enable command code. */
0153 #define WRITE_ENABLE           0x06
0154 /** Write disable command code. */
0155 #define WRITE_DISABLE          0x04
0156 /** Protect sector command code. */
0157 #define PROTECT_SECTOR         0x36
0158 /** Unprotected sector command code. */
0159 #define UNPROTECT_SECTOR       0x39
0160 /** Read sector protection registers command code. */
0161 #define READ_SECTOR_PROT       0x3C
0162 /** Read status register command code. */
0163 #define READ_STATUS_1          0x05
0164 /** Read status register command code. */
0165 #define READ_STATUS_2          0x35
0166 /** Read status register command code. */
0167 #define READ_STATUS_3          0x33
0168 /** Write status register command code. */
0169 #define WRITE_STATUS           0x01
0170 /** Read manufacturer and device ID command code. */
0171 #define READ_JEDEC_ID          0x9F
0172 /** Deep power-down command code. */
0173 #define DEEP_PDOWN             0xB9
0174 /** Resume from deep power-down command code. */
0175 #define RES_DEEP_PDOWN         0xAB
0176 /** Resume from deep power-down command code. */
0177 #define SOFT_RESET_ENABLE      0x66
0178 /** Resume from deep power-down command code. */
0179 #define SOFT_RESET             0x99
0180 /** Resume from deep power-down command code. */
0181 #define WRAP_ENABLE            0x77
0182 /** Continuous Read Mode Reset command code. */
0183 #define CONT_MODE_RESET        0xFF
0184
0185 /** SPI Flash Manufacturer JEDEC ID */
0186 #define ATMEL_SPI_FLASH             0x1F
0187 #define ST_SPI_FLASH                0x20
0188 #define WINBOND_SPI_FLASH           0xEF
0189 #define MACRONIX_SPI_FLASH          0xC2
0190 #define SST_SPI_FLASH               0xBF
0191
0192 /*----------------------------------------------------------------------------
0193  *        Exported functions
0194  *----------------------------------------------------------------------------*/
0195
0196 uint32_t S25FL1D_ReadJedecId(void);
0197
0198 void S25FL1D_InitFlashInterface(uint8_t Mode);
0199
0200 void S25FL1D_SoftReset(void);
0201
0202 void S25FL1D_ContReadModeReset(void);
0203 unsigned char S25FL1D_Unprotect(void);
0204
0205 unsigned char S25FL1D_Protect(uint32_t StartAddr, uint32_t Size);
0206
0207 void S25FL1D_QuadMode(uint8_t Enable);
0208
0209 void S25FL1D_EnableWrap(uint8_t ByetAlign);
0210
0211 void S25FL1D_SetReadLatencyControl(uint8_t Latency);
0212
0213 unsigned char S25FL1D_EraseChip(void);
0214
0215 unsigned char S25FL1D_EraseSector(unsigned int address);
0216
0217 unsigned char S25FL1D_Erase64KBlock(unsigned int address);
0218
0219 unsigned char S25FL1D_Write(
0220     uint32_t *pData,
0221     uint32_t size,
0222     uint32_t address,
0223     uint8_t Secure);
0224
0225 extern unsigned char S25FL1D_Read(
0226     uint32_t *pData,
0227     uint32_t size,
0228     uint32_t address);
0229
0230 extern unsigned char S25FL1D_ReadDual(
0231     uint32_t *pData,
0232     uint32_t size,
0233     uint32_t address);
0234
0235 extern unsigned char S25FL1D_ReadQuad(
0236     uint32_t *pData,
0237     uint32_t size,
0238     uint32_t address);
0239
0240 extern unsigned char S25FL1D_ReadDualIO(
0241     uint32_t *pData,
0242     uint32_t size,
0243     uint32_t address,
0244     uint8_t ContMode,
0245     uint8_t Secure);
0246
0247 extern unsigned char S25FL1D_ReadQuadIO(
0248     uint32_t *pData,
0249     uint32_t size,
0250     uint32_t address,
0251     uint8_t ContMode,
0252     uint8_t Secure);
0253
0254 #endif // #ifndef S25FL1_H
0255