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File indexing completed on 2025-05-11 08:22:44
0001 /** 0002 * @file 0003 * 0004 * @ingroup RTEMSBSPsARMCycVContrib 0005 */ 0006 0007 /*! \file 0008 * Altera - GPIO Module 0009 */ 0010 0011 /****************************************************************************** 0012 * 0013 * Copyright 2013 Altera Corporation. All Rights Reserved. 0014 * 0015 * Redistribution and use in source and binary forms, with or without 0016 * modification, are permitted provided that the following conditions are met: 0017 * 0018 * 1. Redistributions of source code must retain the above copyright notice, 0019 * this list of conditions and the following disclaimer. 0020 * 0021 * 2. Redistributions in binary form must reproduce the above copyright notice, 0022 * this list of conditions and the following disclaimer in the documentation 0023 * and/or other materials provided with the distribution. 0024 * 0025 * 3. The name of the author may not be used to endorse or promote products 0026 * derived from this software without specific prior written permission. 0027 * 0028 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS" AND ANY EXPRESS OR 0029 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 0030 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE DISCLAIMED. IN NO 0031 * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 0032 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 0033 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0034 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0035 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 0036 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 0037 * OF SUCH DAMAGE. 0038 * 0039 ******************************************************************************/ 0040 0041 #ifndef __ALT_GPIO_H__ 0042 #define __ALT_GPIO_H__ 0043 0044 #include <stdint.h> 0045 #include "hwlib.h" 0046 0047 #ifdef __cplusplus 0048 extern "C" { 0049 #endif /* __cplusplus */ 0050 0051 #define ALT_GPIO_BITMASK 0x1FFFFFFF 0052 0053 /* If the GPIO special test mode flag was not defined in the makefile, */ 0054 /* set the ALT_GPIO_DATAREAD_TEST_MODE flag to false to specify that */ 0055 /* the production code version of alt_gpio_port_data_read() is included. */ 0056 /* If the flag is defined as true in the makefile, then the test version */ 0057 /* located in the test code file is substituted instead of the version */ 0058 /* in this file. */ 0059 #ifndef ALT_GPIO_DATAREAD_TEST_MODE 0060 #define ALT_GPIO_DATAREAD_TEST_MODE false 0061 #endif 0062 0063 /******************************************************************************/ 0064 /*! \addtogroup ALT_GPIO_API The General Purpose Input/Output Manager API 0065 * 0066 * This module defines the General Purpose Input/Output Manager API for 0067 * accessing, configuring, and controlling the General Purpose Input/Output 0068 * Manager resources. These include both the general-purpose GPIO signals and 0069 * the input-only GPI signals that are shared with the DDR interface.\n \n 0070 * The GPIO API presents two views or perspectives of the GPIO signals. The first 0071 * is to view the GPIO signals in a traditional way, as separate GPIO ports 0072 * each comprised of a number of GPIO bits. The second perspective is of a 0073 * unified flat view that presents the GPIO and GPI signals as a set of indexed 0074 * bits, a view that allows the programmer to mostly ignore the port and pin 0075 * hardware configuration and read/write/configure the GPIO and GPI signals 0076 * independently of the underlying hardware implementation. 0077 * 0078 * @{ 0079 */ 0080 0081 /******************************************************************************/ 0082 /*! \addtogroup ALT_GPIO_API_CONFIG General-Purpose IO Configuration Functions 0083 * 0084 * This functional group contains functions to control, configure and manage 0085 * the general-purpose IO signals as individual signals or as groups of signals. 0086 * This group of functions can operate on multiple bits within the same GPIO 0087 * port and accepts a bit mask to specify which bits an operation will operate on. 0088 * Other bits within the same GPIO port are not changed. 0089 * 0090 * This example shows how multiple drivers or applications can use this feature 0091 * to easily prevent conflict while accessing the same GPIO port: 0092 * \verbatim 0093 #define DRIVER_0_GPIO_MSK 0x0010FF03; 0094 #define DRIVER_1_GPIO_MSK 0x002000F8; 0095 #define DRIVER_2_GPIO_MSK 0x03C00004; 0096 #define DRIVER_3_GPIO_MSK 0x000F0000; 0097 0098 alt_gpio_port_data_write(ALT_GPIO_PORTA, DRIVER_0_GPIO_MSK, init_val0); 0099 alt_gpio_port_data_write(ALT_GPIO_PORTA, DRIVER_1_GPIO_MSK, init_val1); 0100 alt_gpio_port_data_write(ALT_GPIO_PORTA, DRIVER_2_GPIO_MSK, init_val2); 0101 alt_gpio_port_data_write(ALT_GPIO_PORTA, DRIVER_3_GPIO_MSK, init_val3); 0102 alt_gpio_port_int_type_set(ALT_GPIO_PORTA, DRIVER_1_GPIO_MSK, config_val1); 0103 \endverbatim 0104 * 0105 * @{ 0106 */ 0107 /******************************************************************************/ 0108 /*! 0109 * This type definition enumerates the data direction (input or output) of 0110 * the GPIO signals. 0111 */ 0112 0113 typedef enum ALT_GPIO_PIN_DIR_e 0114 { 0115 /*! # */ 0116 ALT_GPIO_PIN_INPUT, 0117 /*! # */ 0118 ALT_GPIO_PIN_OUTPUT 0119 } ALT_GPIO_PIN_DIR_t; 0120 0121 /******************************************************************************/ 0122 /*! 0123 * This type definition enumerates the type of interrupt source 0124 * (level-triggered or edge-triggered) of the GPIO signals. 0125 */ 0126 0127 typedef enum ALT_GPIO_PIN_TYPE_e 0128 { 0129 /*! # */ 0130 ALT_GPIO_PIN_LEVEL_TRIG_INT, 0131 /*! # */ 0132 ALT_GPIO_PIN_EDGE_TRIG_INT 0133 } ALT_GPIO_PIN_TYPE_t; 0134 0135 /******************************************************************************/ 0136 /*! 0137 * This type definition enumerates the polarity of the interrupt sources 0138 * (falling-edge or rising-edge for edge-triggered interrupts, active-low or 0139 * active-high for level-triggered interrupts) of the GPIO signals. 0140 */ 0141 0142 typedef enum ALT_GPIO_PIN_POL_e 0143 { 0144 /*! Indicates active-low for level-triggered interrupts and 0145 * falling-edge for edge-triggered interrupts */ 0146 ALT_GPIO_PIN_ACTIVE_LOW, 0147 0148 /*! Indicates active-high for level-triggered interrupts and 0149 * rising-edge for edge-triggered interrupt */ 0150 ALT_GPIO_PIN_ACTIVE_HIGH 0151 } ALT_GPIO_PIN_POL_t; 0152 0153 /******************************************************************************/ 0154 /*! 0155 * This type definition enumerates whether or not the debounce metastability 0156 * flip-flops are inserted or not. These are used to debounce signals presented 0157 * to the GPIO inputs. A signal must be steady for two periods of the 0158 * gpio_db_clk clock before it is considered valid. The frequency of the 0159 * gpio_db_clk clock may be set using the Clock Manager API. 0160 */ 0161 0162 typedef enum ALT_GPIO_PIN_DEBOUNCE_e 0163 { 0164 /*! # */ 0165 ALT_GPIO_PIN_NODEBOUNCE, 0166 /*! # */ 0167 ALT_GPIO_PIN_DEBOUNCE 0168 } ALT_GPIO_PIN_DEBOUNCE_t; 0169 0170 /******************************************************************************/ 0171 /*! 0172 * This type definition enumerates whether or not level-sensitive interrupts 0173 * are synchronized to the internal pclk_intr clock. It has no effect for GPIO 0174 * signals that are selected as outputs, or if the interrupt is not enabled, 0175 * or if the interrupt is set to be edge-triggered. This is a port-wide option. 0176 */ 0177 0178 typedef enum ALT_GPIO_PIN_SYNC_e 0179 { 0180 /*! # */ 0181 ALT_GPIO_PIN_NOSYNC, 0182 /*! # */ 0183 ALT_GPIO_PIN_SYNC 0184 } ALT_GPIO_PIN_SYNC_t; 0185 0186 /******************************************************************************/ 0187 /*! 0188 * This type definition enumerates the possible data states of the GPIO bits. 0189 */ 0190 0191 typedef enum ALT_GPIO_PIN_DATA_e 0192 { 0193 /*! # */ 0194 ALT_GPIO_PIN_DATAZERO, 0195 /*! # */ 0196 ALT_GPIO_PIN_DATAONE 0197 } ALT_GPIO_PIN_DATA_t; 0198 0199 0200 /******************************************************************************/ 0201 /*! 0202 * This type definition enumerates the GPIO ports that the GPIO manager 0203 * handles. 0204 */ 0205 0206 typedef enum ALT_GPIO_PORT_e 0207 { 0208 /*! 0209 * \b Port \b A - 29-bit GPIO port A. 0210 */ 0211 ALT_GPIO_PORTA, 0212 0213 /*! 0214 * \b Port \b B - 29-bit GPIO port B. 0215 */ 0216 ALT_GPIO_PORTB, 0217 0218 /*! 0219 * \b Port \b C - 29-bit GPIO port C. \n 13 bits are used for GPIO signals, 0220 * 14 bits are used for GPI-only signals that are shared 0221 * with the DDR interface, 2 bits are not used. Some signals 0222 * may not be connected on some versions. See the relevant 0223 * pin mux data. 0224 */ 0225 ALT_GPIO_PORTC, 0226 0227 /*! 0228 * \b Unknown \b Port - Used to indicate an error. 0229 */ 0230 ALT_GPIO_PORT_UNKNOWN 0231 } ALT_GPIO_PORT_t; 0232 0233 0234 /******************************************************************************/ 0235 /*! 0236 * This type definition enumerates the individual bits within the GPIO ports 0237 * used by the GPIO manager. The bit-ordering must match the hardware 0238 * bit-ordering. Since the ordering and packing of bitfields is not 0239 * standardized in C/C++, the following are defined as masks. \n 0240 * For example, to set bits 3 and 4 of GPIO port B outputs (assuming the bits 0241 * had previously been set to outputs), the user could use the syntax: \par 0242 * \b alt_gpio_port_data_write(\b ALT_GPIO_PORTB, \b ALT_GPIO_BIT3 \b | \b 0243 * ALT_GPIO_BIT4); 0244 */ 0245 0246 typedef enum ALT_GPIO_PORTBIT_e 0247 { 0248 /*! # */ 0249 ALT_GPIO_BIT0 = ALT_TWO_TO_POW0, 0250 /*! # */ 0251 ALT_GPIO_BIT1 = ALT_TWO_TO_POW1, 0252 /*! # */ 0253 ALT_GPIO_BIT2 = ALT_TWO_TO_POW2, 0254 /*! # */ 0255 ALT_GPIO_BIT3 = ALT_TWO_TO_POW3, 0256 /*! # */ 0257 ALT_GPIO_BIT4 = ALT_TWO_TO_POW4, 0258 /*! # */ 0259 ALT_GPIO_BIT5 = ALT_TWO_TO_POW5, 0260 /*! # */ 0261 ALT_GPIO_BIT6 = ALT_TWO_TO_POW6, 0262 /*! # */ 0263 ALT_GPIO_BIT7 = ALT_TWO_TO_POW7, 0264 /*! # */ 0265 ALT_GPIO_BIT8 = ALT_TWO_TO_POW8, 0266 /*! # */ 0267 ALT_GPIO_BIT9 = ALT_TWO_TO_POW9, 0268 /*! # */ 0269 ALT_GPIO_BIT10 = ALT_TWO_TO_POW10, 0270 /*! # */ 0271 ALT_GPIO_BIT11 = ALT_TWO_TO_POW11, 0272 /*! # */ 0273 ALT_GPIO_BIT12 = ALT_TWO_TO_POW12, 0274 /*! # */ 0275 ALT_GPIO_BIT13 = ALT_TWO_TO_POW13, 0276 /*! # */ 0277 ALT_GPIO_BIT14 = ALT_TWO_TO_POW14, 0278 /*! # */ 0279 ALT_GPIO_BIT15 = ALT_TWO_TO_POW15, 0280 /*! # */ 0281 ALT_GPIO_BIT16 = ALT_TWO_TO_POW16, 0282 /*! # */ 0283 ALT_GPIO_BIT17 = ALT_TWO_TO_POW17, 0284 /*! # */ 0285 ALT_GPIO_BIT18 = ALT_TWO_TO_POW18, 0286 /*! # */ 0287 ALT_GPIO_BIT19 = ALT_TWO_TO_POW19, 0288 /*! # */ 0289 ALT_GPIO_BIT20 = ALT_TWO_TO_POW20, 0290 /*! # */ 0291 ALT_GPIO_BIT21 = ALT_TWO_TO_POW21, 0292 /*! # */ 0293 ALT_GPIO_BIT22 = ALT_TWO_TO_POW22, 0294 /*! # */ 0295 ALT_GPIO_BIT23 = ALT_TWO_TO_POW23, 0296 /*! # */ 0297 ALT_GPIO_BIT24 = ALT_TWO_TO_POW24, 0298 /*! # */ 0299 ALT_GPIO_BIT25 = ALT_TWO_TO_POW25, 0300 /*! # */ 0301 ALT_GPIO_BIT26 = ALT_TWO_TO_POW26, 0302 /*! # */ 0303 ALT_GPIO_BIT27 = ALT_TWO_TO_POW27, 0304 /*! # */ 0305 ALT_GPIO_BIT28 = ALT_TWO_TO_POW28, 0306 ALT_GPIO_BIT29 = ALT_TWO_TO_POW29, /* Not currently used */ 0307 ALT_GPIO_BIT30 = ALT_TWO_TO_POW30, /* Not currently used */ 0308 ALT_GPIO_BIT31 = (int32_t) (1UL<<31), /* Not currently used */ 0309 0310 ALT_GPIO_BITNUM_MAX = (28), 0311 ALT_GPIO_BIT_MAX = (1 << ALT_GPIO_BITNUM_MAX), 0312 ALT_END_OF_GPIO_PORT_SIGNALS = (32) 0313 } ALT_GPIO_PORTBIT_t; 0314 0315 0316 0317 /******************************************************************************/ 0318 /*! 0319 * Initialize the GPIO modules before use 0320 * 0321 * \retval ALT_E_SUCCESS The operation was successful. 0322 * \retval ALT_E_ERROR The operation failed. 0323 */ 0324 ALT_STATUS_CODE alt_gpio_init(void); 0325 0326 /******************************************************************************/ 0327 /*! 0328 * Uninitialize the GPIO modules & return to reset state 0329 * 0330 * \retval ALT_E_SUCCESS The operation was successful. 0331 * \retval ALT_E_ERROR The operation failed. 0332 */ 0333 ALT_STATUS_CODE alt_gpio_uninit(void); 0334 0335 /******************************************************************************/ 0336 /*! 0337 * Sets the specified GPIO data bits to use the data direction(s) 0338 * specified. 0339 * 0340 * 0341 * \param gpio_pid 0342 * The GPIO port identifier. 0343 * \param mask 0344 * The group of bits (where mask bits equal one) to apply this 0345 * operation to. Other bits (where mask bits equal zero) are 0346 * not changed. Specify mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to 0347 * configure all data direction bits of the port. 0348 * \param config 0349 * The data-directions of the bits to be set in this operation. 0350 * Individual bits are: \n \b 0 - Use as an input (default). \n 0351 * \b 1 - Use as an output. 0352 * 0353 * \retval ALT_E_SUCCESS The operation was successful. 0354 * \retval ALT_E_ERROR The operation failed. 0355 * \retval ALT_E_BAD_ARG Bad input argument. 0356 */ 0357 ALT_STATUS_CODE alt_gpio_port_datadir_set(ALT_GPIO_PORT_t gpio_pid, 0358 uint32_t mask, uint32_t config); 0359 0360 /******************************************************************************/ 0361 /*! 0362 * Returns the data direction configuration of selected bits of the 0363 * specified GPIO module. 0364 * 0365 * \param gpio_pid 0366 * The GPIO port identifier. 0367 * \param mask 0368 * The group of bits (where mask bits equal one) to read and 0369 * return. Other bits (where mask bits equal zero) are returned 0370 * as zero. Specify mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to 0371 * return all data direction bits of the port. 0372 * 0373 * \retval uint32_t \n Individual bits are: \n \b 0 - The signal is 0374 * configured as an input. 0375 * \n \b 1 - The signal is configured as an output. 0376 * 0377 */ 0378 uint32_t alt_gpio_port_datadir_get(ALT_GPIO_PORT_t gpio_pid, 0379 uint32_t mask); 0380 0381 /******************************************************************************/ 0382 /*! 0383 * Sets the GPIO data outputs of the specified GPIO module to a logic one or 0384 * zero. Outputs are only set if the data direction for those bits is also 0385 * set to configure them as outputs. 0386 * 0387 * \param gpio_pid 0388 * The GPIO port identifier. 0389 * \param mask 0390 * The group of bits (mask bits equal one) to apply this 0391 * operation to. Other bits (mask bits equal zero) are 0392 * not changed. 0393 * \param val 0394 * The 32-bit word to write to the GPIO outputs. Only the 29 LSBs 0395 * are used. Setting the three MSBs causes an error. 0396 * 0397 * \retval ALT_E_SUCCESS The operation was successful. 0398 * \retval ALT_E_ERROR The operation failed. 0399 * \retval ALT_E_BAD_ARG Bad input argument. 0400 */ 0401 ALT_STATUS_CODE alt_gpio_port_data_write(ALT_GPIO_PORT_t gpio_pid, 0402 uint32_t mask, uint32_t val); 0403 0404 /******************************************************************************/ 0405 /*! 0406 * Returns the value of the data inputs of the specified GPIO module. This is 0407 * the current logic value of the pin, whether set to be an input or an output. 0408 * \n If a given signal is set to be an output, this input value can be read to 0409 * determine if the pin is grounded, pulled high, or is floating. 0410 * 0411 * \param gpio_pid 0412 * The GPIO port identifier. 0413 * \param mask 0414 * The group of bits (where mask bits equal one) to return. Other 0415 * bits (where mask bits equal zero) are returned as zero. Specify 0416 * mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to return all data bits of 0417 * the port. 0418 * 0419 * \retval uint32_t The current value of the GPIO module input signals. 0420 */ 0421 uint32_t alt_gpio_port_data_read(ALT_GPIO_PORT_t gpio_pid, uint32_t mask); 0422 0423 0424 /*! @} */ 0425 /******************************************************************************/ 0426 /*! \addtogroup ALT_GPIO_INT General-Purpose IO Interrupt Functions 0427 * 0428 * This functional group contains functions to control and manage the 0429 * interrupts of the General-Purpose IO modules. 0430 * 0431 * @{ 0432 */ 0433 /******************************************************************************/ 0434 /*! 0435 * Sets edge-triggered or level-triggered interrupt configuration for the 0436 * specified signals of the specified GPIO module. 0437 * 0438 * 0439 * \param gpio_pid 0440 * The GPIO port identifier. 0441 * \param mask 0442 * The group of bits (where mask bits equal one) to apply this 0443 * operation to. Other bits (where mask bits equal zero) are 0444 * not changed. Specify mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to 0445 * configure all interrupt type bits of the port. 0446 * \param config 0447 * The interrupt configuration to write. Individual bits 0448 * are: \n \b 0 - Set the 0449 * interrupt for this bit to be level-sensitive (default). \n \b 0450 * 1 - Set the interrupt for this bit to be edge-sensitive. 0451 * 0452 * \retval ALT_E_SUCCESS The operation was successful. 0453 * \retval ALT_E_ERROR The operation failed. 0454 * \retval ALT_E_BAD_ARG Invalid input data. 0455 */ 0456 ALT_STATUS_CODE alt_gpio_port_int_type_set(ALT_GPIO_PORT_t gpio_pid, 0457 uint32_t mask, uint32_t config); 0458 0459 /******************************************************************************/ 0460 /*! 0461 * Returns the interrupt configuration (edge-triggered or level-triggered) for 0462 * the specified bits of the specified GPIO module. 0463 * 0464 * \param gpio_pid 0465 * The GPIO port identifier. 0466 * \param mask 0467 * The group of bits (where mask bits equal one) to return. Other 0468 * bits (where mask bits equal zero) are returned as zero. Specify 0469 * mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to return all configuration 0470 * bits of the port. 0471 * \retval uint32_t 0472 * The current interrupt source configuration. Individual bits 0473 * are: \n \b 0 - The interrupt for this bit is set to be 0474 * level-sensitive. \n \b 1 - 0475 * The interrupt for this bit is set to be edge-sensitive. 0476 * 0477 */ 0478 uint32_t alt_gpio_port_int_type_get(ALT_GPIO_PORT_t gpio_pid, 0479 uint32_t mask); 0480 0481 /******************************************************************************/ 0482 /*! 0483 * Sets the interrupt polarity of the signals of the specified GPIO register 0484 * (when used as inputs) to active-high or active-low (for level-sensitive 0485 * interrupts) or to rising-edge or falling-edge (for edge-sensitive interrupts). 0486 * 0487 * \param gpio_pid 0488 * The GPIO port identifier. 0489 * \param mask 0490 * The group of bits (where mask bits equal one) to apply this 0491 * operation to. Other bits (where mask bits equal zero) are 0492 * not changed. 0493 * \param config 0494 * The interrupt polarity configuration to set. Individual bits 0495 * are: \n \b 0 - Set the interrupt polarity for this bit to 0496 * active-low or falling-edge mode (default). \n \b 1 - Set the 0497 * interrupt polarity for this bit to active-high or rising-edge mode. 0498 * 0499 * \retval ALT_E_SUCCESS The operation was successful. 0500 * \retval ALT_E_ERROR The operation failed. 0501 * \retval ALT_E_BAD_ARG Invalid input data. 0502 */ 0503 ALT_STATUS_CODE alt_gpio_port_int_pol_set(ALT_GPIO_PORT_t gpio_pid, 0504 uint32_t mask, uint32_t config); 0505 0506 /******************************************************************************/ 0507 /*! 0508 * Returns the active-high or active-low polarity configuration for the 0509 * possible interrupt sources of the specified GPIO module. 0510 * 0511 * 0512 * \param gpio_pid 0513 * The GPIO port identifier. 0514 * \param mask 0515 * The group of bits (where mask bits equal one) to return. Other 0516 * bits (where mask bits equal zero) are returned as zero. Specify 0517 * mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to return all the 0518 * configuration bits of the port. 0519 * 0520 * \retval uint32_t 0521 * The current polarity configuration. Individual bits are: \n 0522 * \b 0 = The interrupt polarity for this bit is set to 0523 * active-low or falling-edge mode. \n \b 1 = The interrupt 0524 * polarity for this bit is set to active-high or rising-edge mode. 0525 * 0526 */ 0527 uint32_t alt_gpio_port_int_pol_get(ALT_GPIO_PORT_t gpio_pid, 0528 uint32_t mask); 0529 0530 0531 /*! @} */ 0532 /******************************************************************************/ 0533 /*! \addtogroup ALT_GPIO_API_CONFIG General-Purpose IO Configuration Functions 0534 * 0535 * @{ 0536 */ 0537 /******************************************************************************/ 0538 /*! 0539 * Sets the debounce configuration for input signals of the specified GPIO 0540 * module. If debounce is selected, metastability flip-flops are inserted to 0541 * debounce signals presented to the GPIO inputs. A signal must be steady for 0542 * two periods of the gpio_db_clk clock before it is considered valid. The 0543 * frequency of the gpio_db_clk clock may be set using the Clock Manager API. 0544 * 0545 * \param gpio_pid 0546 * The GPIO port identifier. 0547 * \param mask 0548 * The group of bits (where mask bits equal one) to apply this 0549 * operation to. Other bits (where mask bits equal zero) are 0550 * not changed. Specify mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to 0551 * configure the debounce setting for all bits of the port. 0552 * \param config 0553 * The debounce configuration to set. Individual bits are: \n 0554 * \b 0 - Debounce is not selected for this signal (default). \n 0555 * \b 1 - Debounce is selected for this signal. 0556 * 0557 * \retval ALT_E_SUCCESS The operation was successful. 0558 * \retval ALT_E_ERROR The operation failed. 0559 * \retval ALT_E_BAD_ARG Invalid input data. 0560 */ 0561 ALT_STATUS_CODE alt_gpio_port_debounce_set(ALT_GPIO_PORT_t gpio_pid, 0562 uint32_t mask, uint32_t config); 0563 0564 /******************************************************************************/ 0565 /*! 0566 * Returns the debounce configuration for the input signals of the specified 0567 * GPIO register. If debounce is selected, metastability flip-flops are 0568 * inserted to debounce signals presented to the GPIO inputs. 0569 * 0570 * \param gpio_pid 0571 * The GPIO port identifier. 0572 * \param mask 0573 * The group of bits (where mask bits equal one) to return. Other 0574 * bits (where mask bits equal zero) are returned as zero. Specify 0575 * mask = ALT_GPIO_BITMASK (0x1FFFFFFF) to return all debounce 0576 * configuration bits of the port. 0577 * 0578 * \retval uint32_t 0579 * The current debounce configuration.Individual bits are: \n 0580 * \b 0 - Debounce is not selected for this signal. \n \b 1 - 0581 * Debounce is selected for this signal. 0582 * 0583 */ 0584 uint32_t alt_gpio_port_debounce_get(ALT_GPIO_PORT_t gpio_pid, 0585 uint32_t mask); 0586 0587 /******************************************************************************/ 0588 /*! 0589 * Sets the synchronization configuration for the signals of the specified 0590 * GPIO register. This allows for synchronizing level-sensitive interrupts to 0591 * an internal clock signal. This is a port-wide option that controls all 0592 * level-sensitive interrupt signals of that GPIO port. 0593 * 0594 * \param gpio_pid 0595 * The GPIO port identifier. 0596 * \param config 0597 * \n \b Any \b non-zero \b value - Synchronize to internal clock signal. 0598 * \n \b Zero - Do not synchronize to internal clock signal. 0599 * 0600 * 0601 * \retval ALT_E_SUCCESS The operation was successful. 0602 * \retval ALT_E_ERROR The operation failed. 0603 * \retval ALT_E_BAD_ARG Invalid input data. 0604 */ 0605 ALT_STATUS_CODE alt_gpio_port_sync_set(ALT_GPIO_PORT_t gpio_pid, 0606 uint32_t config); 0607 0608 /******************************************************************************/ 0609 /*! 0610 * 0611 * Returns the synchronization configuration for the signals of the 0612 * specified GPIO register. This allows for synchronizing level-sensitive 0613 * interrupts to the internal clock signal. This is a port-wide option that 0614 * controls all level-sensitive interrupt signals of that GPIO port. 0615 * 0616 * \param gpio_pid 0617 * The GPIO port identifier. 0618 0619 0620 * \retval ALT_E_TRUE Synchronization to clock is enabled for 0621 * level-sensitive interrupts. 0622 * \retval ALT_E_FALSE Synchronization to clock is disabled for 0623 * level-sensitive interrupts. 0624 * \retval ALT_E_BAD_ARG Invalid input argument. 0625 */ 0626 ALT_STATUS_CODE alt_gpio_port_sync_get(ALT_GPIO_PORT_t gpio_pid); 0627 0628 /******************************************************************************/ 0629 /*! 0630 * Configures a group of GPIO signals with identical setup parameters. Allows 0631 * for configuring all parameters of a given port at one time. 0632 * 0633 * \param gpio_pid 0634 * The GPIO port identifier. 0635 * \param mask 0636 * The group of bits to apply this operation to. Other bits (mask 0637 * set to zero) are not changed. 0638 * \param dir 0639 * Data direction. 0640 * \param type 0641 * Edge-triggered or level-triggered interrupts. 0642 * \param pol 0643 * Active-high or active-low polarity. 0644 * \param debounc 0645 * Debounce signals or not. 0646 * \param data 0647 * Set the data output to this value. 0648 * 0649 * \retval ALT_E_SUCCESS The operation was successful. 0650 * \retval ALT_E_ERROR The operation failed. 0651 * \retval ALT_E_BAD_ARG Invalid input argument. 0652 0653 */ 0654 ALT_STATUS_CODE alt_gpio_port_config(ALT_GPIO_PORT_t gpio_pid, 0655 uint32_t mask, ALT_GPIO_PIN_DIR_t dir, ALT_GPIO_PIN_TYPE_t type, 0656 ALT_GPIO_PIN_POL_t pol, ALT_GPIO_PIN_DEBOUNCE_t debounc, 0657 uint32_t data); 0658 0659 /*! @} */ 0660 /******************************************************************************/ 0661 /*! \addtogroup ALT_GPIO_INT General-Purpose IO Interrupt Functions 0662 * 0663 * @{ 0664 */ 0665 /******************************************************************************/ 0666 /*! 0667 * Enables the specified GPIO data input interrupts. 0668 * 0669 * 0670 * \param gpio_pid 0671 * The GPIO port identifier. 0672 * \param config 0673 * Individual bit interrupt enables \n 0674 * \b 0 - Interrupt disabled. \n 0675 * \b 1 - Interrupt enabled. 0676 * 0677 * \retval ALT_E_SUCCESS The operation was successful. 0678 * \retval ALT_E_ERROR The operation failed. 0679 * \retval ALT_E_BAD_ARG Bad input argument. 0680 */ 0681 ALT_STATUS_CODE alt_gpio_port_int_enable(ALT_GPIO_PORT_t gpio_pid, uint32_t config); 0682 0683 /******************************************************************************/ 0684 /*! 0685 * Disables the specified GPIO data module interrupt. 0686 * 0687 * 0688 * \param gpio_pid 0689 * The GPIO port identifier. 0690 * \param config 0691 * Individual bit interrupt enables \n 0692 * \b 0 - Interrupt disabled. \n 0693 * \b 1 - Interrupt enabled. 0694 * 0695 * \retval ALT_E_SUCCESS The operation was successful. 0696 * \retval ALT_E_ERROR The operation failed. 0697 * \retval ALT_E_BAD_ARG Bad input argument. 0698 */ 0699 ALT_STATUS_CODE alt_gpio_port_int_disable(ALT_GPIO_PORT_t gpio_pid, uint32_t config); 0700 0701 /******************************************************************************/ 0702 /*! 0703 * Returns the current state of the specified GPIO port interrupts enables. 0704 * 0705 * \param gpio_pid 0706 * The GPIO port identifier. 0707 * 0708 * \retval uint32_t 0709 * The interrupt enable configuration that was read. Individual bits 0710 * are: \n \b 0 = The interrupt for this bit is not enabled. \n \b 0711 * 1 = The interrupt for this bit is enabled. 0712 */ 0713 uint32_t alt_gpio_port_int_enable_get(ALT_GPIO_PORT_t gpio_pid); 0714 0715 0716 /******************************************************************************/ 0717 /*! 0718 * Masks or unmasks selected interrupt source bits of the data register of 0719 * the specified GPIO module. Uses a second bit mask to determine which 0720 * signals may be changed by this call. 0721 * 0722 * 0723 * \param gpio_pid 0724 * The GPIO port identifier. 0725 * \param mask 0726 * Which bits to change among the port \n \b 0 = 0727 * Do not change this bit. \n \b 1 = Allow this bit to change. 0728 * \param val 0729 * The interrupt mask to write. Individual bits are: \n \b 0 = 0730 * Do not mask the interrupt for this bit (default). \n \b 1 = 0731 * Mask the interrupt for this bit. 0732 * 0733 * \retval ALT_E_SUCCESS The operation was successful. 0734 * \retval ALT_E_ERROR The operation failed. 0735 * \retval ALT_E_BAD_ARG Invalid input data. 0736 */ 0737 ALT_STATUS_CODE alt_gpio_port_int_mask_set(ALT_GPIO_PORT_t gpio_pid, 0738 uint32_t mask, uint32_t val); 0739 0740 /******************************************************************************/ 0741 /*! 0742 * Returns the interrupt mask of the specified GPIO module. 0743 * 0744 * 0745 * \param gpio_pid 0746 * The GPIO port identifier. 0747 * 0748 * \retval uint32_t 0749 * The interrupt mask that was read. Individual bits are: \n 0750 * \b 0 = The interrupt for this bit is not masked. \n \b 1 = The 0751 * interrupt for this bit is masked. 0752 * 0753 */ 0754 uint32_t alt_gpio_port_int_mask_get(ALT_GPIO_PORT_t gpio_pid); 0755 0756 /******************************************************************************/ 0757 /*! 0758 * Returns the interrupt pending status of all signals of the specified GPIO 0759 * register. 0760 * 0761 * 0762 * \param gpio_pid 0763 * The GPIO port identifier. 0764 0765 * \retval uint32_t 0766 * The current interrupt pending status. Individual bits are: \n 0767 * \b 0 - The interrupt for this bit is not pending. \n \b 1 - 0768 * The interrupt for this bit is pending. 0769 * 0770 */ 0771 uint32_t alt_gpio_port_int_status_get(ALT_GPIO_PORT_t gpio_pid); 0772 0773 /******************************************************************************/ 0774 /*! 0775 * Clear the interrupt pending status of selected signals of the 0776 * specified GPIO register. 0777 * 0778 * 0779 * \param gpio_pid 0780 * The GPIO port identifier. 0781 * \param clrmask 0782 * The interrupt bits to clear. Individual bits are: \n \b 0 - 0783 * The interrupt for this bit will not be changed. \n \b 1 - 0784 * The interrupt for this bit will be cleared. 0785 * 0786 * \retval ALT_E_SUCCESS The operation was successful. 0787 * \retval ALT_E_ERROR The operation failed. 0788 * \retval ALT_E_BAD_ARG Invalid input data. 0789 */ 0790 ALT_STATUS_CODE alt_gpio_port_int_status_clear(ALT_GPIO_PORT_t gpio_pid, 0791 uint32_t clrmask); 0792 0793 /*! @} */ 0794 0795 /******************************************************************************/ 0796 /*! \addtogroup ALT_GPIO_BITVIEW General-Purpose IO via Bit Index 0797 * 0798 * This functional group presents a perspective of the General-Purpose IO 0799 * signals as individual GPIO and GPI bits spread across a number of signals 0800 * across several GPIO ports. This allows the programmer the freedom to generally 0801 * ignore the underlying port and signal structure of the GPIO hardware if 0802 * desired. 0803 * 0804 * @{ 0805 */ 0806 /******************************************************************************/ 0807 /*! 0808 * This type definition enumerates the individual bits as one flat array spread 0809 * across the multiple GPIO ports handled by the GPIO manager. The bit-ordering 0810 * must match the hardware bit-ordering. 0811 * 0812 */ 0813 typedef enum ALT_GPIO_1BIT_e 0814 { 0815 /*! # */ 0816 ALT_GPIO_1BIT_0, 0817 /*! # */ 0818 ALT_GPIO_1BIT_1, 0819 /*! # */ 0820 ALT_GPIO_1BIT_2, 0821 /*! # */ 0822 ALT_GPIO_1BIT_3, 0823 /*! # */ 0824 ALT_GPIO_1BIT_4, 0825 /*! # */ 0826 ALT_GPIO_1BIT_5, 0827 /*! # */ 0828 ALT_GPIO_1BIT_6, 0829 /*! # */ 0830 ALT_GPIO_1BIT_7, 0831 /*! # */ 0832 ALT_GPIO_1BIT_8, 0833 /*! # */ 0834 ALT_GPIO_1BIT_9, 0835 /*! # */ 0836 ALT_GPIO_1BIT_10, 0837 /*! # */ 0838 ALT_GPIO_1BIT_11, 0839 /*! # */ 0840 ALT_GPIO_1BIT_12, 0841 /*! # */ 0842 ALT_GPIO_1BIT_13, 0843 /*! # */ 0844 ALT_GPIO_1BIT_14, 0845 /*! # */ 0846 ALT_GPIO_1BIT_15, 0847 /*! # */ 0848 ALT_GPIO_1BIT_16, 0849 /*! # */ 0850 ALT_GPIO_1BIT_17, 0851 /*! # */ 0852 ALT_GPIO_1BIT_18, 0853 /*! # */ 0854 ALT_GPIO_1BIT_19, 0855 /*! # */ 0856 ALT_GPIO_1BIT_20, 0857 /*! # */ 0858 ALT_GPIO_1BIT_21, 0859 /*! # */ 0860 ALT_GPIO_1BIT_22, 0861 /*! # */ 0862 ALT_GPIO_1BIT_23, 0863 /*! # */ 0864 ALT_GPIO_1BIT_24, 0865 /*! # */ 0866 ALT_GPIO_1BIT_25, 0867 /*! # */ 0868 ALT_GPIO_1BIT_26, 0869 /*! # */ 0870 ALT_GPIO_1BIT_27, 0871 /*! # */ 0872 ALT_GPIO_1BIT_28, 0873 /*! # */ 0874 ALT_GPIO_1BIT_29, 0875 /*! # */ 0876 ALT_GPIO_1BIT_30, 0877 /*! # */ 0878 ALT_GPIO_1BIT_31, 0879 /*! # */ 0880 ALT_GPIO_1BIT_32, 0881 /*! # */ 0882 ALT_GPIO_1BIT_33, 0883 /*! # */ 0884 ALT_GPIO_1BIT_34, 0885 /*! # */ 0886 ALT_GPIO_1BIT_35, 0887 /*! # */ 0888 ALT_GPIO_1BIT_36, 0889 /*! # */ 0890 ALT_GPIO_1BIT_37, 0891 /*! # */ 0892 ALT_GPIO_1BIT_38, 0893 /*! # */ 0894 ALT_GPIO_1BIT_39, 0895 /*! # */ 0896 ALT_GPIO_1BIT_40, 0897 /*! # */ 0898 ALT_GPIO_1BIT_41, 0899 /*! # */ 0900 ALT_GPIO_1BIT_42, 0901 /*! # */ 0902 ALT_GPIO_1BIT_43, 0903 /*! # */ 0904 ALT_GPIO_1BIT_44, 0905 /*! # */ 0906 ALT_GPIO_1BIT_45, 0907 /*! # */ 0908 ALT_GPIO_1BIT_46, 0909 /*! # */ 0910 ALT_GPIO_1BIT_47, 0911 /*! # */ 0912 ALT_GPIO_1BIT_48, 0913 /*! # */ 0914 ALT_GPIO_1BIT_49, 0915 /*! # */ 0916 ALT_GPIO_1BIT_50, 0917 /*! # */ 0918 ALT_GPIO_1BIT_51, 0919 /*! # */ 0920 ALT_GPIO_1BIT_52, 0921 /*! # */ 0922 ALT_GPIO_1BIT_53, 0923 /*! # */ 0924 ALT_GPIO_1BIT_54, 0925 /*! # */ 0926 ALT_GPIO_1BIT_55, 0927 /*! # */ 0928 ALT_GPIO_1BIT_56, 0929 /*! # */ 0930 ALT_GPIO_1BIT_57, 0931 /*! # */ 0932 ALT_GPIO_1BIT_58, 0933 /*! # */ 0934 ALT_GPIO_1BIT_59, 0935 /*! # */ 0936 ALT_GPIO_1BIT_60, 0937 /*! # */ 0938 ALT_GPIO_1BIT_61, 0939 /*! # */ 0940 ALT_GPIO_1BIT_62, 0941 /*! # */ 0942 ALT_GPIO_1BIT_63, 0943 /*! # */ 0944 ALT_GPIO_1BIT_64, 0945 /*! # */ 0946 ALT_GPIO_1BIT_65, 0947 /*! # */ 0948 ALT_GPIO_1BIT_66, 0949 /*! # */ 0950 ALT_GPIO_1BIT_67, /* Not bonded out on some versions */ 0951 /*! # */ 0952 ALT_GPIO_1BIT_68, /* Not bonded out on some versions */ 0953 /*! # */ 0954 ALT_GPIO_1BIT_69, /* Not bonded out on some versions */ 0955 0956 /*! The last of the input/output bits */ 0957 ALT_GPIO_1BIT_70, /* Not bonded out on some versions */ 0958 0959 0960 /*! This and the following signals are not present on all SoCs. \n 0961 * If present, the selection between their use as 14 General-purpose inputs or 0962 * use as 14 DDR interface signals is made in the IOCSR (IO Configuration Shift 0963 * Register) and software to make this selection is in the IO Manager API. If 0964 * they are present, they are restricted to using the same power supply voltage 0965 * as the SDRAM module.*/ 0966 ALT_HLGPI_0, /* Not bonded out on some versions */ 0967 /*! # */ 0968 ALT_HLGPI_1, /* Not bonded out on some versions */ 0969 /*! # */ 0970 ALT_HLGPI_2, /* Not bonded out on some versions */ 0971 /*! # */ 0972 ALT_HLGPI_3, /* Not bonded out on some versions */ 0973 /*! # */ 0974 ALT_HLGPI_4, /* Not bonded out on some versions */ 0975 /*! # */ 0976 ALT_HLGPI_5, /* Not bonded out on some versions */ 0977 /*! # */ 0978 ALT_HLGPI_6, /* Not bonded out on some versions */ 0979 /*! # */ 0980 ALT_HLGPI_7, /* Not bonded out on some versions */ 0981 /*! # */ 0982 ALT_HLGPI_8, /* Not bonded out on some versions */ 0983 /*! # */ 0984 ALT_HLGPI_9, /* Not bonded out on some versions */ 0985 /*! # */ 0986 ALT_HLGPI_10, /* Not bonded out on some versions */ 0987 /*! # */ 0988 ALT_HLGPI_11, /* Not bonded out on some versions */ 0989 /*! # */ 0990 ALT_HLGPI_12, /* Not bonded out on some versions */ 0991 /*! # */ 0992 ALT_HLGPI_13, /* Not bonded out on some versions */ 0993 0994 ALT_HLGPI_14, /* Not bonded out */ 0995 0996 ALT_HLGPI_15, /* Not bonded out */ 0997 0998 ALT_GPIO_INVALID, 0999 ALT_END_OF_GPIO_SIGNALS = -1, 1000 ALT_LAST_VALID_GPIO_BIT = ALT_HLGPI_15 1001 } ALT_GPIO_1BIT_t; 1002 1003 1004 /******************************************************************************/ 1005 /*! 1006 * This configuration record definition is used for configuring bits and 1007 * groups of bits of the GPIO interface. 1008 */ 1009 typedef struct ALT_GPIO_CONFIG_RECORD_s 1010 { 1011 /*! 1012 * The index number of the signal to configure. */ 1013 ALT_GPIO_1BIT_t signal_number; 1014 /*! 1015 * The data direction of the signal. */ 1016 ALT_GPIO_PIN_DIR_t direction; 1017 /*! 1018 * Edge-triggered or level triggered interrupts. */ 1019 ALT_GPIO_PIN_TYPE_t type; 1020 /*! 1021 * Active-high or active-low trigger for the interrupt. */ 1022 ALT_GPIO_PIN_POL_t polarity; 1023 /*! 1024 * Enable or disable GPIO debounce capability. */ 1025 ALT_GPIO_PIN_DEBOUNCE_t debounce; 1026 /*! 1027 * If the signal is an output, the data value to be output. */ 1028 ALT_GPIO_PIN_DATA_t data; 1029 } ALT_GPIO_CONFIG_RECORD_t; 1030 1031 /******************************************************************************/ 1032 /*! 1033 * This pin record type definition is comprised of the signal index and 1034 * associated input or output data. 1035 */ 1036 typedef struct ALT_GPIO_PIN_RECORD_s 1037 { 1038 /*! 1039 * The index number of the signal. */ 1040 ALT_GPIO_1BIT_t signal_number; 1041 /*! 1042 * Data - zero or one. */ 1043 ALT_GPIO_PIN_DATA_t val; 1044 } ALT_GPIO_PIN_RECORD_t; 1045 1046 /*! @} */ 1047 1048 /******************************************************************************/ 1049 /*! \addtogroup ALT_GPIO_BITVIEW General-Purpose IO via Bit Index 1050 * 1051 * @{ 1052 */ 1053 /******************************************************************************/ 1054 /*! 1055 * Configures all parameters for one bit (signal) of the GPIO ports. 1056 * 1057 * \param signal_num 1058 * The GPIO port signal index. 1059 * \param dir 1060 * The data direction for this signal. 1061 * \param type 1062 * Edge-triggered or Level-triggered interrupt for this signal. 1063 * \param pol 1064 * Active-high or active-low interrupt polarity for this signal. 1065 * \param debounce 1066 * Enable the debounce flip-flops for this signal or not. 1067 * \param data 1068 * If the GPIO signal is set to be an output, set it to 1069 * this value 1070 * 1071 * \retval ALT_E_SUCCESS The operation was successful. 1072 * \retval ALT_E_ERROR The operation failed. 1073 * \retval ALT_E_BAD_ARG Invalid input argument. 1074 */ 1075 ALT_STATUS_CODE alt_gpio_bit_config(ALT_GPIO_1BIT_t signal_num, 1076 ALT_GPIO_PIN_DIR_t dir, ALT_GPIO_PIN_TYPE_t type, 1077 ALT_GPIO_PIN_POL_t pol, ALT_GPIO_PIN_DEBOUNCE_t debounce, 1078 ALT_GPIO_PIN_DATA_t data); 1079 1080 /******************************************************************************/ 1081 /*! 1082 * Returns the configuration parameters of a given GPIO bit. 1083 * 1084 * \param signal_num 1085 * The GPIO port signal index. 1086 * \param config 1087 * Pointer to a single GPIO_CONFIG_RECORD_s configuration record. 1088 * The fields of this configuration record are filled in 1089 * by the function. 1090 * 1091 * \retval ALT_E_SUCCESS The operation was successful. 1092 * \retval ALT_E_ERROR The operation failed. 1093 * \retval ALT_E_BAD_ARG Invalid input argument. 1094 1095 */ 1096 ALT_STATUS_CODE alt_gpio_bitconfig_get(ALT_GPIO_1BIT_t signal_num, 1097 ALT_GPIO_CONFIG_RECORD_t *config); 1098 1099 /******************************************************************************/ 1100 /*! 1101 * Configures a list of GPIO bits. The GPIO bits do not have to be 1102 * configured the same, as was the case for the mask version of this function, 1103 * alt_gpio_port_config(). Each bit may be configured differently and bits may 1104 * be listed in any order. 1105 * 1106 * \param config_array 1107 * Pointer to an array of GPIO_CONFIG_RECORD_s configuration 1108 * records. These definitions contain all the parameters 1109 * needed to set up the listed pins. All or 1110 * any subset of the GPIO signals can be configured. Signals do 1111 * not have to be listed in numerical order or be unique. If a 1112 * signal number is listed multiple times, the last configuration 1113 * listed is used. \n Configuration terminates either when \b len 1114 * signals have been configured or if the next signal number index 1115 * in the array is equal to \b ALT_END_OF_GPIO_SIGNALS (-1). 1116 * 1117 * \param len 1118 * Length of array to configure. 1119 * 1120 * \retval ALT_E_SUCCESS The operation was successful. 1121 * \retval ALT_E_ERROR The operation failed. 1122 * \retval ALT_E_BAD_ARG Invalid input argument. 1123 1124 */ 1125 ALT_STATUS_CODE alt_gpio_group_config(ALT_GPIO_CONFIG_RECORD_t* config_array, 1126 uint32_t len); 1127 1128 /******************************************************************************/ 1129 /*! 1130 * Returns a list of the pin signal indices and the associated configuration 1131 * settings (data direction, interrupt type, polarity, and debounce) of that 1132 * list of signals. 1133 * 1134 * \param config_array 1135 * Pointer to an array of ALT_GPIO_CONFIG_RECORD_t configuration 1136 * records. Only the signal indices in the first field of each 1137 * configuration record need be filled in. This function will 1138 * fill in all the other fields of the configuration record, 1139 * returning all configuration parameters in the array. 1140 * Signals do not have to be listed in numerical order or be 1141 * unique. If a signal number is listed multiple times, the 1142 * configuration record will contain multiple entries for 1143 * that signal. \n Configuration reading terminates either when 1144 * \b len signal configurations have been read or if the next 1145 * signal number index in the array is equal to 1146 * \b ALT_END_OF_GPIO_SIGNALS (-1). 1147 * \param len 1148 * Length of configuration array to read and return. 1149 * 1150 * 1151 * \retval ALT_E_SUCCESS The operation was successful. 1152 * \retval ALT_E_ERROR The operation failed. 1153 * \retval ALT_E_BAD_ARG Invalid input argument. 1154 1155 */ 1156 ALT_STATUS_CODE alt_gpio_group_config_get(ALT_GPIO_CONFIG_RECORD_t *config_array, 1157 uint32_t len); 1158 1159 /******************************************************************************/ 1160 /*! 1161 * Returns a list of the pin signal indices and the associated configuration 1162 * settings (data direction, interrupt type, polarity, and debounce) of that 1163 * list of signals. The difference between this version and 1164 * alt_gpio_group_config_get() is this version follows a separate list of 1165 * signal indices instead of having the signal list provided in the first 1166 * field of the configuration records in the array. 1167 * 1168 * \param pinid_array 1169 * Pointer to a list of signal index numbers. These indices 1170 * are copied to the first field of each configuration record 1171 * in the returned array. 1172 * \param config_array 1173 * Pointer to an array of ALT_GPIO_CONFIG_RECORD_t configuration 1174 * records. This function will fill in the fields of the 1175 * configuration record, returning all configuration parameters 1176 * in the array. Signals do not have to be listed in numerical 1177 * order or be unique. If a signal number is listed multiple 1178 * times, the configuration record array will contain multiple 1179 * identical entries for that signal. \n Configuration reading 1180 * terminates either when \b len signal configurations have been 1181 * read or if the next signal number index in the array is equal 1182 * to \b ALT_END_OF_GPIO_SIGNALS (-1). 1183 * \param len 1184 * Length of configuration array to read. 1185 * 1186 * 1187 * \retval ALT_E_SUCCESS The operation was successful. 1188 * \retval ALT_E_ERROR The operation failed. 1189 * \retval ALT_E_BAD_ARG Invalid input argument. 1190 * 1191 */ 1192 ALT_STATUS_CODE alt_gpio_group_config_get2(ALT_GPIO_1BIT_t* pinid_array, 1193 ALT_GPIO_CONFIG_RECORD_t *config_array, uint32_t len); 1194 1195 1196 /*! @} */ 1197 /******************************************************************************/ 1198 /*! \addtogroup ALT_GPIO_UTILITY General-Purpose IO Utility Functions 1199 * 1200 * These are useful utility functions for the general-purpose input & output 1201 * module. 1202 * 1203 * @{ */ 1204 /******************************************************************************/ 1205 /*! 1206 * Returns the ID code of the specified GPIO module. 1207 * 1208 * \param gpio_pid 1209 * The GPIO port identifier. 1210 * 1211 * 1212 * \retval uint32_t The component code of the module, GPIO_MODULE_IDCODE. 1213 */ 1214 uint32_t alt_gpio_port_idcode_get(ALT_GPIO_PORT_t gpio_pid); 1215 1216 /******************************************************************************/ 1217 /*! 1218 * Returns the version code of the specified GPIO module. 1219 * 1220 * \param gpio_pid 1221 * The GPIO port identifier. 1222 * 1223 * 1224 * \retval uint32_t The encoded revision number of the module. 1225 */ 1226 uint32_t alt_gpio_port_ver_get(ALT_GPIO_PORT_t gpio_pid); 1227 1228 1229 /******************************************************************************/ 1230 /*! 1231 * Extracts the GPIO port ID from the supplied GPIO Signal Index Number. 1232 */ 1233 ALT_GPIO_PORT_t alt_gpio_bit_to_pid(ALT_GPIO_1BIT_t pin_num); 1234 1235 1236 /******************************************************************************/ 1237 /*! 1238 * Extracts the GPIO signal (pin) offset from the supplied GPIO Signal Index 1239 * Number. 1240 * */ 1241 ALT_GPIO_PORTBIT_t alt_gpio_bit_to_port_pin(ALT_GPIO_1BIT_t pin_num); 1242 1243 /******************************************************************************/ 1244 /*! 1245 * Extracts the GPIO Signal Index Number from the supplied GPIO port ID and 1246 * signal mask. If passed a bitmask composed of more than one signal, the 1247 * signal number of the lowest bit in the bitmask presented is returned. 1248 * 1249 */ 1250 ALT_GPIO_1BIT_t alt_gpio_port_pin_to_bit(ALT_GPIO_PORT_t pid, 1251 uint32_t bitmask); 1252 1253 1254 /*! @} */ 1255 /*! @} */ 1256 1257 #ifdef __cplusplus 1258 } 1259 #endif /* __cplusplus */ 1260 #endif /* __ALT_GPIO_H__ */
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