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File indexing completed on 2025-05-11 08:22:44
0001 /** 0002 * @file 0003 * 0004 * @ingroup RTEMSBSPsARMCycVContrib 0005 */ 0006 0007 /* 0008 * Altera - SoC UART Manager 0009 */ 0010 0011 /***************************************************************************** 0012 * 0013 * Copyright 2013 Altera Corporation. All Rights Reserved. 0014 * 0015 * Redistribution and use in source and binary forms, with or without 0016 * modification, are permitted provided that the following conditions are met: 0017 * 0018 * 1. Redistributions of source code must retain the above copyright notice, 0019 * this list of conditions and the following disclaimer. 0020 * 0021 * 2. Redistributions in binary form must reproduce the above copyright notice, 0022 * this list of conditions and the following disclaimer in the documentation 0023 * and/or other materials provided with the distribution. 0024 * 0025 * 3. The name of the author may not be used to endorse or promote products 0026 * derived from this software without specific prior written permission. 0027 * 0028 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS" AND ANY EXPRESS OR 0029 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 0030 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE DISCLAIMED. IN NO 0031 * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 0032 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 0033 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 0034 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 0035 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 0036 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 0037 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 0038 * 0039 *****************************************************************************/ 0040 0041 #ifndef __ALT_16550_UART_H__ 0042 #define __ALT_16550_UART_H__ 0043 0044 #include "hwlib.h" 0045 #include "alt_clock_manager.h" 0046 0047 #ifdef __cplusplus 0048 extern "C" 0049 { 0050 #endif 0051 0052 /*! 0053 * \addtogroup UART UART Driver API 0054 * 0055 * This module defines the Universal Asynchronous Receiver/Transmitter (UART) 0056 * API for accessing and using the UART resources. The API allows for general 0057 * control of a 16550 compatible UART controller. 0058 * 0059 * This implementation can control the following UARTs: 0060 * * SoCFPGA On-board UARTs 0061 * * Altera 16550 Compatible Soft IP UART 0062 * 0063 * The following reference materials were used in the design of this API: 0064 * * Synopsys® DesignWare DW_apb_uart Databook v3.10a 0065 * 0066 * @{ 0067 */ 0068 0069 /*! 0070 * \addtogroup UART_BASIC UART Basic 0071 * 0072 * This group of APIs provides basic access to the UART to initialize, 0073 * uninitialize, read, write, and reset the UART. 0074 * 0075 * @{ 0076 */ 0077 0078 /*! 0079 * This type definition enumerates the list of UARTs available on the system. 0080 */ 0081 typedef enum ALT_16550_DEVICE_e 0082 { 0083 /*! 0084 * This option selects UART0 in the SoC FPGA. 0085 */ 0086 ALT_16550_DEVICE_SOCFPGA_UART0 = 0, 0087 0088 /*! 0089 * This option selects UART1 in the SoC FPGA. 0090 */ 0091 ALT_16550_DEVICE_SOCFPGA_UART1 = 1, 0092 0093 /*! 0094 * This option selects an Altera 16550 Compatible soft IP UART. The memory 0095 * location of the device must be provided as part of the initialization. 0096 */ 0097 ALT_16550_DEVICE_ALTERA_16550_UART = 0x100 0098 } 0099 ALT_16550_DEVICE_t; 0100 0101 /*! 0102 * This structure is used to represent a handle to a specific UART on the 0103 * system. The internal members are undocumented and should be not altered 0104 * outside of this API. 0105 */ 0106 typedef struct ALT_16550_HANDLE_s 0107 { 0108 ALT_16550_DEVICE_t device; 0109 void * location; 0110 alt_freq_t clock_freq; 0111 uint32_t data; 0112 uint32_t fcr; 0113 } 0114 ALT_16550_HANDLE_t; 0115 0116 /*! 0117 * Performs the initialization steps needed by the UART. This should be the 0118 * first API call made when accessing a particular UART 0119 * 0120 * The default UART setting is 8 databits, no parity, 1 stopbit, and 57600 0121 * baud. 0122 * 0123 * For the SoCFPGA UARTs, The ALT_CLK_L4_SP clock needs to be setup before 0124 * initialization. 0125 * 0126 * \param device 0127 * The UART device identifier. 0128 * 0129 * \param location 0130 * The memory of the location for the given UART. For SoCFPGA 0131 * UARTs, this parameter is ignored. 0132 * 0133 * \param clock_freq 0134 * The clock frequency of the serial clock for the given UART. 0135 * For SoCFPGA UARTs, this paramter is ignored. 0136 * 0137 * \param handle 0138 * [out] A pointer to a handle that will represent the UART. This 0139 * handle should subsequently be used when calling other UART 0140 * APIs. 0141 * 0142 * \retval ALT_E_SUCCESS The operation was successful. 0143 * \retval ALT_E_ERROR The operation failed. 0144 * \retval ALT_E_BAD_ARG The given UART device identifier is invalid. 0145 * \retval ALT_E_BAD_CLK The required clock is not yet setup. 0146 */ 0147 ALT_STATUS_CODE alt_16550_init(ALT_16550_DEVICE_t device, 0148 void * location, 0149 alt_freq_t clock_freq, 0150 ALT_16550_HANDLE_t * handle); 0151 0152 /*! 0153 * Performs the uninitialization steps for the UART. This should be the last 0154 * API call made to cleanup the UART. 0155 * 0156 * After calling this function, the handle will need to be initialized again 0157 * before being used by calling alt_16550_init(). 0158 * 0159 * \param handle 0160 * The UART device handle. 0161 * 0162 * \retval ALT_E_SUCCESS The operation was successful. 0163 * \retval ALT_E_ERROR The operation failed. 0164 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0165 */ 0166 ALT_STATUS_CODE alt_16550_uninit(ALT_16550_HANDLE_t * handle); 0167 0168 /*! 0169 * Resets the UART to the default configuration. The UART will be reset and 0170 * reinitialized. 0171 * 0172 * \param handle 0173 * The UART device handle. 0174 * 0175 * \retval ALT_E_SUCCESS The operation was successful. 0176 * \retval ALT_E_ERROR The operation failed. 0177 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0178 */ 0179 ALT_STATUS_CODE alt_16550_reset(ALT_16550_HANDLE_t * handle); 0180 0181 /*! 0182 * Starts the UART after all configuration has been completed. 0183 * 0184 * \param handle 0185 * The UART device handle. 0186 * 0187 * \retval ALT_E_SUCCESS The operation was successful. 0188 * \retval ALT_E_ERROR The operation failed. 0189 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0190 */ 0191 ALT_STATUS_CODE alt_16550_enable(ALT_16550_HANDLE_t * handle); 0192 0193 /*! 0194 * Stops the UART. While UART configuration can be done while enabled, it is 0195 * not recommended. 0196 * 0197 * \param handle 0198 * The UART device handle. 0199 * 0200 * \retval ALT_E_SUCCESS The operation was successful. 0201 * \retval ALT_E_ERROR The operation failed. 0202 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0203 */ 0204 ALT_STATUS_CODE alt_16550_disable(ALT_16550_HANDLE_t * handle); 0205 0206 /*! 0207 * Reads a single character from the UART receiver buffer. This API should 0208 * only be used when FIFOs are disabled. 0209 * 0210 * \param handle 0211 * The UART device handle. 0212 * 0213 * \param item 0214 * [out] Pointer to an output parameter that contains the in 0215 * receiver buffer of the UART. 0216 * 0217 * \retval ALT_E_SUCCESS The operation was successful. 0218 * \retval ALT_E_ERROR The operation failed. 0219 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0220 */ 0221 ALT_STATUS_CODE alt_16550_read(ALT_16550_HANDLE_t * handle, 0222 char * item); 0223 0224 /*! 0225 * Writes a single character to the UART transmitter buffer. This API should 0226 * only be used when FIFOs are disabled. 0227 * 0228 * \param handle 0229 * The UART device handle. 0230 * 0231 * \param item 0232 * The character to write to the transmitter buffer of the UART. 0233 * 0234 * \retval ALT_E_SUCCESS The operation was successful. 0235 * \retval ALT_E_ERROR The operation failed. 0236 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0237 */ 0238 ALT_STATUS_CODE alt_16550_write(ALT_16550_HANDLE_t * handle, 0239 char item); 0240 0241 /*! 0242 * @} 0243 */ 0244 0245 /*! 0246 * \addtogroup UART_FIFO UART FIFO Interface 0247 * 0248 * This group of APIs provides access, configuration, and control of the UART 0249 * FIFO. The FIFO allows the UART to buffer received data and data to be 0250 * transmitted. 0251 * 0252 * @{ 0253 */ 0254 0255 /*! 0256 * This type definition enumerates the receiver FIFO level conditions that 0257 * will trigger the receiver FIFO to issue a receiver FIFO full event. 0258 */ 0259 typedef enum ALT_16550_FIFO_TRIGGER_RX_e 0260 { 0261 /*! 0262 * 1 or more character(s) in the receiver FIFO will trigger an event. 0263 */ 0264 ALT_16550_FIFO_TRIGGER_RX_ANY = 0, 0265 0266 /*! 0267 * 25% or higher capacity usage in the receiver FIFO will trigger an 0268 * event. 0269 */ 0270 ALT_16550_FIFO_TRIGGER_RX_QUARTER_FULL = 1, 0271 0272 /*! 0273 * 50% or higher capacity usage in the receiver FIFO will trigger an 0274 * event. 0275 */ 0276 ALT_16550_FIFO_TRIGGER_RX_HALF_FULL = 2, 0277 0278 /*! 0279 * 2 characters less than the receiver FIFO capacity will trigger an 0280 * event. 0281 */ 0282 ALT_16550_FIFO_TRIGGER_RX_ALMOST_FULL = 3 0283 } 0284 ALT_16550_FIFO_TRIGGER_RX_t; 0285 0286 /*! 0287 * This type definition enumerates the transmitter FIFO level conditions that 0288 * will trigger the transmitter FIFO to issue a transmitter FIFO empty event. 0289 */ 0290 typedef enum ALT_16550_FIFO_TRIGGER_TX_e 0291 { 0292 /*! 0293 * Transmitter FIFO being completely empty will trigger an event. 0294 */ 0295 ALT_16550_FIFO_TRIGGER_TX_EMPTY = 0, 0296 0297 /*! 0298 * 2 or less character(s) in the transmitter FIFO will trigger an event. 0299 */ 0300 ALT_16550_FIFO_TRIGGER_TX_ALMOST_EMPTY = 1, 0301 0302 /*! 0303 * 25% or less capacity usage in the transmitter FIFO will trigger an 0304 * event. 0305 */ 0306 ALT_16550_FIFO_TRIGGER_TX_QUARTER_FULL = 2, 0307 0308 /*! 0309 * 50% or less capacity usage in the transmitter FIFO will trigger an 0310 * event. 0311 */ 0312 ALT_16550_FIFO_TRIGGER_TX_HALF_FULL = 3 0313 } 0314 ALT_16550_FIFO_TRIGGER_TX_t; 0315 0316 /*! 0317 * Enables FIFO on the UART. This will enable both the receiver FIFO and 0318 * transmitter FIFO. Both FIFOs will be cleared. 0319 * 0320 * \param handle 0321 * The UART device handle. 0322 * 0323 * \retval ALT_E_SUCCESS The operation was successful. 0324 * \retval ALT_E_ERROR The operation failed. 0325 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0326 */ 0327 ALT_STATUS_CODE alt_16550_fifo_enable(ALT_16550_HANDLE_t * handle); 0328 0329 /*! 0330 * Disables FIFOs on the UART. This will disable both the receiver FIFO and 0331 * transmitter FIFO. Any data left in the FIFOs will be lost. 0332 * 0333 * \param handle 0334 * The UART device handle. 0335 * 0336 * \retval ALT_E_SUCCESS The operation was successful. 0337 * \retval ALT_E_ERROR The operation failed. 0338 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0339 */ 0340 ALT_STATUS_CODE alt_16550_fifo_disable(ALT_16550_HANDLE_t * handle); 0341 0342 /*! 0343 * Reads the given buffer from the receiver FIFO in the UART. 0344 * 0345 * The available characters in the FIFO can be determined by a few ways. Users 0346 * can determine the number of items by calling alt_16550_fifo_level_get_rx(). 0347 * 0348 * Another way is by using the RX trigger and RX interrupt. First determine the 0349 * RX FIFO size by calling alt_16550_fifo_size_get_rx(). Then set the desired 0350 * trigger level by calling alt_16550_fifo_trigger_set_rx(). Calculate the 0351 * triggering point by applying trigger description on the FIFO size. Enable RX 0352 * interrupts by calling alt_16550_int_enable_rx(). When the RX interrupt fires 0353 * due to the ALT_16550_INT_STATUS_RX_DATA condition, the calculated triggering 0354 * point value can be used to determine the RX FIFO level. If the interrupt 0355 * fires due to the ALT_16550_INT_STATUS_RX_TIMEOUT, the RX FIFO can be 0356 * completely emptied by repeatedly polling the Line Status 0357 * ALT_16550_LINE_STATUS_DR condition by calling alt_16550_line_status_get(). 0358 * These steps are necessary if the UART does not implement FIFO level query 0359 * functionality. As of 13.0sp1, this applies to the Altera 16550 Compatible 0360 * Soft UART. 0361 * 0362 * Reading more data than that which is available can result in invalid data 0363 * appearing like valid data. 0364 * 0365 * The FIFO must first be enabled before calling this function by calling 0366 * alt_16550_fifo_enable(). 0367 * 0368 * \param handle 0369 * The UART device handle. 0370 * 0371 * \param buffer 0372 * [out] Pointer to a buffer where the specified count of 0373 * characters from the receiver FIFO will be copied to. 0374 * 0375 * \param count 0376 * The count of characters from the receiver FIFO to be copied. 0377 * 0378 * \retval ALT_E_SUCCESS The operation was successful. 0379 * \retval ALT_E_ERROR The operation failed. 0380 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0381 */ 0382 ALT_STATUS_CODE alt_16550_fifo_read(ALT_16550_HANDLE_t * handle, 0383 char * buffer, 0384 size_t count); 0385 0386 /*! 0387 * Writes the given buffer to the transmitter FIFO in the UART. 0388 * 0389 * The available space in the FIFO can be determined by a few ways. Users can 0390 * determine the number of items by calculating the FIFO capacity minus the 0391 * FIFO level. This can be done by calling alt_16550_fifo_size_get_tx() and 0392 * alt_16550_fifo_level_get_tx() respectively. 0393 * 0394 * Another way is by using the TX trigger and TX interrupt. First determine the 0395 * TX FIFO size by calling alt_16550_fifo_size_get_tx(). The set the desired 0396 * trigger level by calling alt_16550_fifo_trigger_set_tx(). Calculate the 0397 * triggering point by applying the trigger description on the FIFO size. 0398 * Enable TX interrupts by calling alt_16550_int_enable_tx(). When the TX 0399 * interrupt fires, calculate the empty entries in the FIFO by subtracting the 0400 * TX FIFO size and the calculated value. These steps are necessary if the UART 0401 * does not implement FIFO level query functionality. As of 13.0sp1, this 0402 * applies to the Altera 16550 Compatible Soft UART. 0403 * 0404 * Writing more data that there is space can result in data lost due to 0405 * overflowing. 0406 * 0407 * The FIFOs must first be enabled before calling this function by calling 0408 * alt_16550_fifo_enable(). 0409 * 0410 * \param handle 0411 * The UART device handle. 0412 * 0413 * \param buffer 0414 * Pointer to a buffer from where the specified count of 0415 * characters will be copied to the transmitter FIFO. 0416 * 0417 * \param count 0418 * The count of characters from the given buffer to be copied. 0419 * 0420 * \retval ALT_E_SUCCESS The operation was successful. 0421 * \retval ALT_E_ERROR The operation failed. 0422 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0423 */ 0424 ALT_STATUS_CODE alt_16550_fifo_write(ALT_16550_HANDLE_t * handle, 0425 const char * buffer, 0426 size_t count); 0427 0428 /*! 0429 * Clears the contents of the receiver FIFO. Any characters which were 0430 * previously contained in that FIFO will be discarded. 0431 * 0432 * The FIFOs must first be enabled before calling this function by calling 0433 * alt_16550_fifo_enable(). 0434 * 0435 * \param handle 0436 * The UART device handle. 0437 * 0438 * \retval ALT_E_SUCCESS The operation was successful. 0439 * \retval ALT_E_ERROR The operation failed. 0440 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0441 */ 0442 ALT_STATUS_CODE alt_16550_fifo_clear_rx(ALT_16550_HANDLE_t * handle); 0443 0444 /*! 0445 * Clears the contents of the transmitter FIFO. Any characters which were 0446 * previously contained in that FIFO will be discarded. 0447 * 0448 * The FIFOs must first be enabled before calling this function by calling 0449 * alt_16550_fifo_enable(). 0450 * 0451 * \param handle 0452 * The UART device handle. 0453 * 0454 * \retval ALT_E_SUCCESS The operation was successful. 0455 * \retval ALT_E_ERROR The operation failed. 0456 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0457 */ 0458 ALT_STATUS_CODE alt_16550_fifo_clear_tx(ALT_16550_HANDLE_t * handle); 0459 0460 /*! 0461 * Clears the contents of the receiver and transmitter FIFO. Any characters 0462 * which were previously contained on those FIFOs will be discarded. 0463 * 0464 * The FIFOs must first be enabled before calling this function by calling 0465 * alt_16550_fifo_enable(). 0466 * 0467 * \param handle 0468 * The UART device handle. 0469 * 0470 * \retval ALT_E_SUCCESS The operation was successful. 0471 * \retval ALT_E_ERROR The operation failed. 0472 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0473 */ 0474 ALT_STATUS_CODE alt_16550_fifo_clear_all(ALT_16550_HANDLE_t * handle); 0475 0476 /*! 0477 * Queries the size of the receiver FIFO. 0478 * 0479 * \param handle 0480 * The UART device handle. 0481 * 0482 * \param size 0483 * [out] Pointer to an output parameter that contains the size of 0484 * the receiver FIFO. 0485 * 0486 * \retval ALT_E_SUCCESS The operation was successful. 0487 * \retval ALT_E_ERROR The operation failed. 0488 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0489 */ 0490 ALT_STATUS_CODE alt_16550_fifo_size_get_rx(ALT_16550_HANDLE_t * handle, 0491 uint32_t * size); 0492 0493 /*! 0494 * Queries the size of the transmitter FIFO. 0495 * 0496 * \param handle 0497 * The UART device handle. 0498 * 0499 * \param size 0500 * [out] Pointer to an output parameter that contains the size of 0501 * the transmitter FIFO. 0502 * 0503 * \retval ALT_E_SUCCESS The operation was successful. 0504 * \retval ALT_E_ERROR The operation failed. 0505 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0506 */ 0507 ALT_STATUS_CODE alt_16550_fifo_size_get_tx(ALT_16550_HANDLE_t * handle, 0508 uint32_t * size); 0509 0510 /*! 0511 * Queries the current level of the receiver FIFO. 0512 * 0513 * The FIFOs must first be enabled before calling this function by calling 0514 * alt_16550_fifo_enable(). 0515 * 0516 * For the Altera 16550 Compatible UART, it may not be possible to read the 0517 * FIFO level and this function may always report 0. For more information on 0518 * interacting with the FIFO in this situation, see documentation for 0519 * alt_16550_fifo_read(). 0520 * 0521 * \param handle 0522 * The UART device handle. 0523 * 0524 * \param level 0525 * [out] Pointer to an output parameter that contains the level 0526 * or number of characters in the receiver FIFO. 0527 * 0528 * \retval ALT_E_SUCCESS The operation was successful. 0529 * \retval ALT_E_ERROR The operation failed. 0530 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0531 */ 0532 ALT_STATUS_CODE alt_16550_fifo_level_get_rx(ALT_16550_HANDLE_t * handle, 0533 uint32_t * level); 0534 0535 /*! 0536 * Queries the current level of the transmitter FIFO. 0537 * 0538 * The FIFOs must first be enabled before calling this function by calling 0539 * alt_16550_fifo_enable(). 0540 * 0541 * For the Altera 16550 Compatible UART, it may not be possible to read the 0542 * FIFO level and this function may always report 0. For more information on 0543 * interacting with the FIFO in this situation, see documentation for 0544 * alt_16550_fifo_write(). 0545 * 0546 * \param handle 0547 * The UART device handle. 0548 * 0549 * \param level 0550 * [out] Pointer to an output parameter that contains the level 0551 * or number of characters in the transmitter FIFO. 0552 * 0553 * \retval ALT_E_SUCCESS The operation was successful. 0554 * \retval ALT_E_ERROR The operation failed. 0555 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0556 */ 0557 ALT_STATUS_CODE alt_16550_fifo_level_get_tx(ALT_16550_HANDLE_t * handle, 0558 uint32_t * level); 0559 0560 /*! 0561 * Sets the receiver FIFO level which will trigger the receiver FIFO to issue 0562 * receiver FIFO full event. For the list of available receiver FIFO trigger 0563 * levels, see the documentation for ALT_16550_FIFO_TRIGGER_RX_t. 0564 * 0565 * The FIFOs must first be enabled before calling this function by calling 0566 * alt_16550_fifo_enable(). 0567 * 0568 * \param handle 0569 * The UART device handle. 0570 * 0571 * \param trigger 0572 * The level of the receiver FIFO which is needed to trigger a 0573 * receiver FIFO full event. 0574 * 0575 * \retval ALT_E_SUCCESS The operation was successful. 0576 * \retval ALT_E_ERROR The operation failed. 0577 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0578 */ 0579 ALT_STATUS_CODE alt_16550_fifo_trigger_set_rx(ALT_16550_HANDLE_t * handle, 0580 ALT_16550_FIFO_TRIGGER_RX_t trigger); 0581 0582 /*! 0583 * Sets the transmitter FIFO level which will trigger the transmitter FIFO to 0584 * transmitter FIFO empty event. For the list of available transmitter FIFO 0585 * trigger levels, see the documentation for ALT_16550_FIFO_TRIGGER_TX_t. 0586 * 0587 * The FIFOs must first be enabled before calling this function by calling 0588 * alt_16550_fifo_enable(). 0589 * 0590 * \param handle 0591 * The UART device handle. 0592 * 0593 * \param trigger 0594 * The level of the transmitter FIFO which is needed to trigger a 0595 * transmitter FIFO empty event. 0596 * 0597 * \retval ALT_E_SUCCESS The operation was successful. 0598 * \retval ALT_E_ERROR The operation failed. 0599 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0600 */ 0601 ALT_STATUS_CODE alt_16550_fifo_trigger_set_tx(ALT_16550_HANDLE_t * handle, 0602 ALT_16550_FIFO_TRIGGER_TX_t trigger); 0603 0604 /*! 0605 * @} 0606 */ 0607 0608 /*! 0609 * \addtogroup UART_BAUD UART Baudrate Interface 0610 * 0611 * This group of APIs allows for the configuration of the UART's baudrate 0612 * generation related functions. 0613 * 0614 * The UART baudrate is determined by dividing the ALT_CLK_L4_SP clock with 0615 * the configured divisor. 0616 * 0617 * @{ 0618 */ 0619 0620 /*! 0621 * This enumeration lists out the common baudrates used with modem and serial 0622 * ports. Not every baudrate is available for the UART due to the limits of 0623 * the serial clock frequency and divisor value. 0624 */ 0625 typedef enum ALT_16550_BAUDRATE_e 0626 { 0627 ALT_16550_BAUDRATE_50 = 50, /*!< 50 bps baudrate. */ 0628 ALT_16550_BAUDRATE_75 = 75, /*!< 75 bps baudrate. */ 0629 ALT_16550_BAUDRATE_150 = 150, /*!< 150 bps baudrate. */ 0630 ALT_16550_BAUDRATE_300 = 300, /*!< 300 bps baudrate. */ 0631 ALT_16550_BAUDRATE_600 = 600, /*!< 600 bps baudrate. */ 0632 ALT_16550_BAUDRATE_900 = 900, /*!< 900 bps baudrate. */ 0633 ALT_16550_BAUDRATE_1200 = 1200, /*!< 1200 bps baudrate. */ 0634 ALT_16550_BAUDRATE_1800 = 1800, /*!< 1800 bps baudrate. */ 0635 ALT_16550_BAUDRATE_2400 = 2400, /*!< 2400 bps baudrate. */ 0636 ALT_16550_BAUDRATE_3600 = 3600, /*!< 3600 bps baudrate. */ 0637 ALT_16550_BAUDRATE_4800 = 4800, /*!< 4800 bps baudrate. */ 0638 ALT_16550_BAUDRATE_7200 = 7200, /*!< 7200 bps baudrate. */ 0639 ALT_16550_BAUDRATE_9600 = 9600, /*!< 9600 bps baudrate. */ 0640 ALT_16550_BAUDRATE_14400 = 14400, /*!< 14400 bps baudrate. */ 0641 ALT_16550_BAUDRATE_19200 = 19200, /*!< 19200 bps baudrate. */ 0642 ALT_16550_BAUDRATE_28800 = 28800, /*!< 28800 bps baudrate. */ 0643 ALT_16550_BAUDRATE_38400 = 38400, /*!< 38400 bps baudrate. */ 0644 ALT_16550_BAUDRATE_57600 = 57600, /*!< 57600 bps baudrate. */ 0645 ALT_16550_BAUDRATE_115200 = 115200 /*!< 115200 bps baudrate. */ 0646 } 0647 ALT_16550_BAUDRATE_t; 0648 0649 /*! 0650 * Gets the baudrate for the UART. 0651 * 0652 * This is done by calculating the baudrate from the divisor and the serial 0653 * clock. The reported baudrate may not correspond exactly to the request 0654 * baudrate. 0655 * 0656 * \param handle 0657 * The UART device handle. 0658 * 0659 * \param baudrate 0660 * [out] Pointer to an output paramter that contains the current 0661 * baudrate of the UART. 0662 * 0663 * \retval ALT_E_SUCCESS The operation was successful. 0664 * \retval ALT_E_ERROR The operation failed. 0665 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0666 */ 0667 ALT_STATUS_CODE alt_16550_baudrate_get(ALT_16550_HANDLE_t * handle, 0668 uint32_t * baudrate); 0669 0670 /*! 0671 * Sets the baudrate for the UART. This change will take effect when the UART 0672 * moves from disabled to enabled. 0673 * 0674 * This is done by calculating the correct divisor using the request baudrate 0675 * and the known serial clock. 0676 * 0677 * \param handle 0678 * The UART device handle. 0679 * 0680 * \param baudrate 0681 * The requested baudrate for the UART. 0682 * 0683 * \retval ALT_E_SUCCESS The operation was successful. 0684 * \retval ALT_E_ERROR The operation failed. 0685 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0686 * \retval ALT_E_ARG_RANGE The given baudrate is not possible due to 0687 * limitations of the baudrate divisor and/or 0688 * serial clock. 0689 */ 0690 ALT_STATUS_CODE alt_16550_baudrate_set(ALT_16550_HANDLE_t * handle, 0691 uint32_t baudrate); 0692 0693 /*! 0694 * Gets the baudrate divisor for the UART. 0695 * 0696 * The baudrate is determined by the following formula: 0697 * * Baudrate = (serial clock frequency) / (16 * divisor) 0698 * 0699 * \param handle 0700 * The UART device handle. 0701 * 0702 * \param divisor 0703 * [out] Pointer to an output parameter that contains the current 0704 * divisor used for baudrate generation. 0705 * 0706 * \retval ALT_E_SUCCESS The operation was successful. 0707 * \retval ALT_E_ERROR The operation failed. 0708 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0709 */ 0710 ALT_STATUS_CODE alt_16550_divisor_get(ALT_16550_HANDLE_t * handle, 0711 uint32_t * divisor); 0712 0713 /*! 0714 * Sets the baudrate divisor for the UART. This change will take effect when 0715 * the UART moves from disabled to enabled. 0716 * 0717 * The baudrate is determined by the following formula: 0718 * * Baudrate = (serial clock frequency) / (16 * divisor) 0719 * 0720 * \param handle 0721 * The UART device handle. 0722 * 0723 * \param divisor 0724 * The specified divisor value to use for baudrate generation. 0725 * Valid values are 1 - 65535. 0726 * 0727 * \retval ALT_E_SUCCESS The operation was successful. 0728 * \retval ALT_E_ERROR The operation failed. 0729 * \retval ALT_E_BAD_ARG The given UART identifier is invalid or the 0730 * specified divisor is not supported by the 0731 * UART. 0732 */ 0733 ALT_STATUS_CODE alt_16550_divisor_set(ALT_16550_HANDLE_t * handle, 0734 uint32_t divisor); 0735 0736 /*! 0737 * @} 0738 */ 0739 0740 /*! 0741 * \addtogroup UART_INT UART Interrupt Interface 0742 * 0743 * This group of APIs provides access, configuration, and control of the 0744 * UART interrupts. 0745 * 0746 * @{ 0747 */ 0748 0749 /*! 0750 * This type definition enumerates the different interrupt conditions that can 0751 * be generated by the UART controller. 0752 * 0753 * Interrupts are listed in highest to lowest priority order. 0754 */ 0755 typedef enum ALT_16550_INT_STATUS_e 0756 { 0757 /*! 0758 * This interrupt signals that a overrun, parity, or framing error 0759 * occurred, or a break event occured. The interrupt is cleared by reading 0760 * the line status by calling alt_16550_line_status_get() or by disabling 0761 * line status interrupts by calling alt_16550_int_disable_line(). 0762 */ 0763 ALT_16550_INT_STATUS_LINE = 0x6, 0764 0765 /*! 0766 * This interrupt signals that some data is available to be read from the 0767 * UART. The definition of some depends on whether FIFOs are enabled or 0768 * not. 0769 * 0770 * If FIFOs are disabled, this interrupt signals that the receiver 0771 * contains data. In this case, the interrupt is cleared by reading the 0772 * data from the UART by calling alt_16550_read(). 0773 * 0774 * If FIFOs are enabled, this interrupt signals that the receiver FIFO 0775 * level is above the receiver trigger level specified. In this case, the 0776 * interrupt is cleared by reading a sufficiently large buffer from the 0777 * receiver FIFO such that the FIFO is filled below the receiver trigger 0778 * level specified by calling alt_16550_fifo_read() or by adjusting the 0779 * receiver trigger level appropriately by calling 0780 * alt_16550_fifo_trigger_set_rx(). 0781 * 0782 * In either case, this interrupt can also be cleared by disabling 0783 * receiver interrupts by calling alt_16550_int_disable_rx(). 0784 */ 0785 ALT_16550_INT_STATUS_RX_DATA = 0x4, 0786 0787 /*! 0788 * This interrupt signals that data is available in the receiver FIFO and 0789 * that there has been no activity with the receiver FIFO for the last 4 0790 * character frames. In essence, the receiver FIFO has temporarily settled 0791 * thus it may be a good time to empty the receiver FIFO. This interrupt 0792 * is only available if FIFOs are enabled. The interrupt is cleared by 0793 * reading from the receiver FIFO by calling alt_16550_fifo_read() or by 0794 * disabling receiver interrupts by calling alt_16550_int_disable_rx(). 0795 */ 0796 ALT_16550_INT_STATUS_RX_TIMEOUT = 0xC, 0797 0798 /*! 0799 * This interrupt signals that the transmitter is idling. The definition 0800 * of idling depends on whether FIFOs are enabled or not. 0801 * 0802 * If FIFOs are disabled, this interrupt signals that the transmitter 0803 * shift register is empty. In this case, the interrupt is cleared by 0804 * writing data to the UART by calling alt_16550_write(). 0805 * 0806 * If FIFO are enabled, this interrupt signals that the transmitter FIFO 0807 * level is below the transmitter trigger level specified. In this case, 0808 * the interrupt is cleared by writing a sufficiently large buffer to the 0809 * transmitter FIFO such that the FIFO is filled above the transmitter 0810 * trigger level specified by calling alt_16550_fifo_write() or by 0811 * adjusting the transmitter trigger level appropriately by calling 0812 * alt_16550_fifo_trigger_set_tx(). 0813 * 0814 * In either case, this interrupt can also be cleared by disabling 0815 * transmitter interrupts by calling alt_16550_int_disable_tx(). 0816 */ 0817 ALT_16550_INT_STATUS_TX_IDLE = 0x2, 0818 0819 /*! 0820 * Modem status interrupt pending. The interrupt is cleared by reading the 0821 * modem status by calling alt_16550_modem_status_get() or by disabling 0822 * modem status interrupts by calling alt_16550_int_disable_modem(). 0823 */ 0824 ALT_16550_INT_STATUS_MODEM = 0x0, 0825 0826 /*! 0827 * No interrupts pending. 0828 */ 0829 ALT_16550_INT_STATUS_NONE = 0x1 0830 } 0831 ALT_16550_INT_STATUS_t; 0832 0833 /*! 0834 * Enables the receiver FIFO to generate interrupts. Enabling this interrupt 0835 * allows for the following interrupt signal(s): 0836 * * ALT_16550_INT_STATUS_RX_DATA 0837 * * ALT_16550_INT_STATUS_RX_TIMEOUT 0838 * 0839 * This interrupt is disabled by default. 0840 * 0841 * The FIFOs must also be enabled for this interrupt to actually be generated. 0842 * 0843 * \param handle 0844 * The UART device handle. 0845 * 0846 * \retval ALT_E_SUCCESS The operation was successful. 0847 * \retval ALT_E_ERROR The operation failed. 0848 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0849 */ 0850 ALT_STATUS_CODE alt_16550_int_enable_rx(ALT_16550_HANDLE_t * handle); 0851 0852 /*! 0853 * Disables the receiver FIFO from generating interrupts. 0854 * 0855 * \param handle 0856 * The UART device handle. 0857 * 0858 * \retval ALT_E_SUCCESS The operation was successful. 0859 * \retval ALT_E_ERROR The operation failed. 0860 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0861 */ 0862 ALT_STATUS_CODE alt_16550_int_disable_rx(ALT_16550_HANDLE_t * handle); 0863 0864 /*! 0865 * Enables the transmitter FIFO to generate interrupts. Enabling this 0866 * interrupt allows for the following interrupt signal(s): 0867 * * ALT_16550_INT_STATUS_TX_IDLE 0868 * 0869 * This interrupt is disabled by default. 0870 * 0871 * The FIFOs must also be enabled for this interrupt to actually be generated. 0872 * 0873 * \param handle 0874 * The UART device handle. 0875 * 0876 * \retval ALT_E_SUCCESS The operation was successful. 0877 * \retval ALT_E_ERROR The operation failed. 0878 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0879 */ 0880 ALT_STATUS_CODE alt_16550_int_enable_tx(ALT_16550_HANDLE_t * handle); 0881 0882 /*! 0883 * Disables the transmitter FIFO from generating interrupts. 0884 * 0885 * \param handle 0886 * The UART device handle. 0887 * 0888 * \retval ALT_E_SUCCESS The operation was successful. 0889 * \retval ALT_E_ERROR The operation failed. 0890 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0891 */ 0892 ALT_STATUS_CODE alt_16550_int_disable_tx(ALT_16550_HANDLE_t * handle); 0893 0894 /*! 0895 * Enables the receiver to generate line status interrupts. Enabling this 0896 * interrupt allows for the following interrupt signal(s): 0897 * * ALT_16550_INT_STATUS_LINE 0898 * 0899 * This interrupt is disabled by default. 0900 * 0901 * \param handle 0902 * The UART device handle. 0903 * 0904 * \retval ALT_E_SUCCESS The operation was successful. 0905 * \retval ALT_E_ERROR The operation failed. 0906 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0907 */ 0908 ALT_STATUS_CODE alt_16550_int_enable_line(ALT_16550_HANDLE_t * handle); 0909 0910 /*! 0911 * Disables the receiver from generating line status interrupts. 0912 * 0913 * \param handle 0914 * The UART device handle. 0915 * 0916 * \retval ALT_E_SUCCESS The operation was successful. 0917 * \retval ALT_E_ERROR The operation failed. 0918 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0919 */ 0920 ALT_STATUS_CODE alt_16550_int_disable_line(ALT_16550_HANDLE_t * handle); 0921 0922 /*! 0923 * Enables the UART to generate modem status interrupts. Enabling this 0924 * interrupt allows for the following interrupt signal(s): 0925 * * ALT_16550_INT_STATUS_MODEM 0926 * 0927 * This interrupt is disabled by default. 0928 * 0929 * \param handle 0930 * The UART device handle. 0931 * 0932 * \retval ALT_E_SUCCESS The operation was successful. 0933 * \retval ALT_E_ERROR The operation failed. 0934 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0935 */ 0936 ALT_STATUS_CODE alt_16550_int_enable_modem(ALT_16550_HANDLE_t * handle); 0937 0938 /*! 0939 * Disables the UART from generate modem status interrupts. 0940 * 0941 * \param handle 0942 * The UART device handle. 0943 * 0944 * \retval ALT_E_SUCCESS The operation was successful. 0945 * \retval ALT_E_ERROR The operation failed. 0946 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0947 */ 0948 ALT_STATUS_CODE alt_16550_int_disable_modem(ALT_16550_HANDLE_t * handle); 0949 0950 /*! 0951 * Disables all interrupts on the UART. 0952 * 0953 * \param handle 0954 * The UART device handle. 0955 * 0956 * \retval ALT_E_SUCCESS The operation was successful. 0957 * \retval ALT_E_ERROR The operation failed. 0958 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0959 */ 0960 ALT_STATUS_CODE alt_16550_int_disable_all(ALT_16550_HANDLE_t * handle); 0961 0962 /*! 0963 * Queries the interrupt status of the UART. This returns the highest priority 0964 * interrupt pending. The appropriate interrupts must be enabled for them be 0965 * generated in the UART. 0966 * 0967 * \param handle 0968 * The UART device handle. 0969 * 0970 * \param status 0971 * [out] Pointer to an output parameter that contains the current 0972 * interrupt status of the UART. 0973 * 0974 * \retval ALT_E_SUCCESS The operation was successful. 0975 * \retval ALT_E_ERROR The operation failed. 0976 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 0977 */ 0978 ALT_STATUS_CODE alt_16550_int_status_get(ALT_16550_HANDLE_t * handle, 0979 ALT_16550_INT_STATUS_t * status); 0980 0981 /*! 0982 * @} 0983 */ 0984 0985 /*! 0986 * \addtogroup UART_MODEM UART Modem Interface 0987 * 0988 * This group of APIs provides access, configuration, and control of the UART 0989 * Modem interface. 0990 * 0991 * @{ 0992 */ 0993 0994 /*! 0995 * This type definition enumerates the set of UART modem status conditions as 0996 * register mask values. 0997 */ 0998 typedef enum ALT_16550_MODEM_STATUS_e 0999 { 1000 /*! 1001 * Data Carrier Detect. This status indicates that the carrier has been 1002 * detected by the modem. It corresponds to an inverted dcd_n input. DCD 1003 * is unasserted when dcd_n is logic 1 and asserted when dcd_n is logic 0. 1004 */ 1005 ALT_16550_MODEM_STATUS_DCD = 1 << 7, 1006 1007 /*! 1008 * Ring Indicator. This status indicates that the telephone ringing signal 1009 * has been redeived by the modem. It corresponds to an inverted ri_n 1010 * input. RI is unasserted when ri_n is logic 1 and asserted when ri_n is 1011 * logic 0. 1012 */ 1013 ALT_16550_MODEM_STATUS_RI = 1 << 6, 1014 1015 /*! 1016 * Data Set Ready. This status indicates that the modem is ready to 1017 * establish communications with the UART. It corresponds to an inverted 1018 * dsr_n input. DSR is unasserted when dsr_n is logic 1 and asserted when 1019 * dsr_n is logic 0. 1020 */ 1021 ALT_16550_MODEM_STATUS_DSR = 1 << 5, 1022 1023 /*! 1024 * Clear To Send. This status indicates the current state of the modem 1025 * cts_n line. It corresponds to an inverted cts_n input. CTS is 1026 * unasserted when cts_n is logic 1 and asserted when cts_n is logic 0. 1027 */ 1028 ALT_16550_MODEM_STATUS_CTS = 1 << 4, 1029 1030 /*! 1031 * Delta Data Carrier Detect. This status condition indicates that the 1032 * Data Carrier Detect has changed since the last time the modem status 1033 * was read. Reading the modem status clears this status. For more 1034 * information about the Data Carrier Detect status, see 1035 * ALT_16550_MODEM_STATUS_DCD. 1036 */ 1037 ALT_16550_MODEM_STATUS_DDCD = 1 << 3, 1038 1039 /*! 1040 * Trailing Edge of Ring Indicator. This status indicates that the Ring 1041 * Indicator has changed from asserted to unasserted. Reading the modem 1042 * status will clear this status. For more information about the Ring 1043 * Indicator status, reference ALT_16550_MODEM_STATUS_RI. 1044 */ 1045 ALT_16550_MODEM_STATUS_TERI = 1 << 2, 1046 1047 /*! 1048 * Delta Data Set Ready. This status condition indicates that the Data Set 1049 * Ready has changed since the last time the modem status was read. 1050 * Reading the modem status will clear this status. For more information 1051 * about the Data Set Ready status, see ALT_16550_MODEM_STATUS_DSR. 1052 */ 1053 ALT_16550_MODEM_STATUS_DDSR = 1 << 1, 1054 1055 /*! 1056 * Delta Clear To Send. This status condition indicates that the Clear To 1057 * Send has changed since the last time the modem status was read. Reading 1058 * the modem status will clear this status. For more information about the 1059 * Clear To Send status, see ALT_16550_MODEM_STATUS_CTS. 1060 */ 1061 ALT_16550_MODEM_STATUS_DCTS = 1 << 0 1062 } 1063 ALT_16550_MODEM_STATUS_t; 1064 1065 /*! 1066 * Enables automatic flow control in the UART modem. When in this mode, the 1067 * rts_n is gated with the threshold trigger condition of the receiver FIFO. 1068 * 1069 * The Altera 16550 Compatible Soft IP UART may not have this option enabled. 1070 * 1071 * The FIFOs must be enabled for flow control to be used. 1072 * 1073 * The recommended bring up for flow control is as follows: 1074 * * Enable automatic flow control by calling alt_16550_flowcontrol_enable(). 1075 * This will allow both the receiver FIFO and user RTS to control the rts_n 1076 * output. Because the user RTS is not enabled, the rts_n will be inactive 1077 * high. 1078 * * Enable RTS by calling alt_16550_modem_enable_rts(). This will give the 1079 * receiver FIFO to have full control of the rts_n output. 1080 * 1081 * \param handle 1082 * The UART device handle. 1083 * 1084 * \retval ALT_E_SUCCESS The operation was successful. 1085 * \retval ALT_E_ERROR The operation failed. 1086 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1087 */ 1088 ALT_STATUS_CODE alt_16550_flowcontrol_enable(ALT_16550_HANDLE_t * handle); 1089 1090 /*! 1091 * Disables automatic flow control in the UART modem. 1092 * 1093 * The recommended bring down for flow control is as follows: 1094 * * Disable RTS by calling alt_16550_modem_disable_rts(). This will disable 1095 * generation of the rts_n ouput. 1096 * * Disable automatic flow control by calling 1097 * alt_16550_flowcontrol_disable(). 1098 * 1099 * The receiver FIFO will still be active after these steps. 1100 * 1101 * \param handle 1102 * The UART device handle. 1103 * 1104 * \retval ALT_E_SUCCESS The operation was successful. 1105 * \retval ALT_E_ERROR The operation failed. 1106 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1107 */ 1108 ALT_STATUS_CODE alt_16550_flowcontrol_disable(ALT_16550_HANDLE_t * handle); 1109 1110 /*! 1111 * Puts the UART in loopback mode. This is used for diagnostic and test 1112 * purposes. 1113 * 1114 * The SoCFPGA UARTs does not support automatic flow control when in loopback 1115 * mode. 1116 * 1117 * The Altera 16550 Compatible Soft IP UART implements this in 13.0sp1 and 1118 * later. Setting this has no effect with 13.0. 1119 * 1120 * When in this mode, the modem control inputs (dsr_n, cts_n, ri_n, dcd_n) are 1121 * disconnected and the modem control outputs (dtr_n, rts_n, out1_n, out2_n) 1122 * are held inactive high externally and internally looped back to the inputs. 1123 * 1124 * \param handle 1125 * The UART device handle. 1126 * 1127 * \retval ALT_E_SUCCESS The operation was successful. 1128 * \retval ALT_E_ERROR The operation failed. 1129 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1130 */ 1131 ALT_STATUS_CODE alt_16550_loopback_enable(ALT_16550_HANDLE_t * handle); 1132 1133 /*! 1134 * Takes the UART out of loopback mode. 1135 * 1136 * \param handle 1137 * The UART device handle. 1138 * 1139 * \retval ALT_E_SUCCESS The operation was successful. 1140 * \retval ALT_E_ERROR The operation failed. 1141 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1142 */ 1143 ALT_STATUS_CODE alt_16550_loopback_disable(ALT_16550_HANDLE_t * handle); 1144 1145 /*! 1146 * Asserts the OUT1 output. OUT1 is inverted then driven out to out1_n. 1147 * 1148 * There are special considerations when the UART is in loopback mode. See 1149 * alt_16550_loopback_enable() for more information. 1150 * 1151 * \param handle 1152 * The UART device handle. 1153 * 1154 * \retval ALT_E_SUCCESS The operation was successful. 1155 * \retval ALT_E_ERROR The operation failed. 1156 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1157 */ 1158 ALT_STATUS_CODE alt_16550_modem_enable_out1(ALT_16550_HANDLE_t * handle); 1159 1160 /*! 1161 * Unasserts the OUT1 output. OUT1 is inverted then driven out to out1_n. 1162 * 1163 * There are special considerations when the UART is in loopback mode. See 1164 * alt_16550_loopback_enable() for more information. 1165 * 1166 * \param handle 1167 * The UART device handle. 1168 * 1169 * \retval ALT_E_SUCCESS The operation was successful. 1170 * \retval ALT_E_ERROR The operation failed. 1171 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1172 */ 1173 ALT_STATUS_CODE alt_16550_modem_disable_out1(ALT_16550_HANDLE_t * handle); 1174 1175 /*! 1176 * Asserts the OUT2 output. OUT2 is inverted then driven out to out2_n. 1177 * 1178 * There are special considerations when the UART is in loopback mode. See 1179 * alt_16550_loopback_enable() for more information. 1180 * 1181 * \param handle 1182 * The UART device handle. 1183 * 1184 * \retval ALT_E_SUCCESS The operation was successful. 1185 * \retval ALT_E_ERROR The operation failed. 1186 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1187 */ 1188 ALT_STATUS_CODE alt_16550_modem_enable_out2(ALT_16550_HANDLE_t * handle); 1189 1190 /*! 1191 * Unasserts the OUT2 output. OUT2 is inverted then driven out to out2_n. 1192 * 1193 * There are special considerations when the UART is in loopback mode. See 1194 * alt_16550_loopback_enable() for more information. 1195 * 1196 * \param handle 1197 * The UART device handle. 1198 * 1199 * \retval ALT_E_SUCCESS The operation was successful. 1200 * \retval ALT_E_ERROR The operation failed. 1201 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1202 */ 1203 ALT_STATUS_CODE alt_16550_modem_disable_out2(ALT_16550_HANDLE_t * handle); 1204 1205 /*! 1206 * Asserts the RTS (Request To Send) output. RTS is inverted then driven out 1207 * to rts_n. RTS is used to inform the modem that the UART is ready to receive 1208 * data. 1209 * 1210 * There are special considerations when the UART is in automatic flow control 1211 * mode. See alt_16550_flowcontrol_enable() for more information. 1212 * 1213 * There are special considerations when the UART is in loopback mode. See 1214 * alt_16550_loopback_enable() for more information. 1215 * 1216 * \param handle 1217 * The UART device handle. 1218 * 1219 * \retval ALT_E_SUCCESS The operation was successful. 1220 * \retval ALT_E_ERROR The operation failed. 1221 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1222 */ 1223 ALT_STATUS_CODE alt_16550_modem_enable_rts(ALT_16550_HANDLE_t * handle); 1224 1225 /*! 1226 * Deaserts the RTS (Request To Send) output. RTS is inverted then driven out 1227 * to rts_n. 1228 * 1229 * There are special considerations when the UART is in automatic flow control 1230 * mode. See alt_16550_flowcontrol_enable() for more information. 1231 * 1232 * There are special considerations when the UART is in loopback mode. See 1233 * alt_16550_loopback_enable() for more information. 1234 * 1235 * \param handle 1236 * The UART device handle. 1237 * 1238 * \retval ALT_E_SUCCESS The operation was successful. 1239 * \retval ALT_E_ERROR The operation failed. 1240 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1241 */ 1242 ALT_STATUS_CODE alt_16550_modem_disable_rts(ALT_16550_HANDLE_t * handle); 1243 1244 /*! 1245 * Asserts the DTR (Data Terminal Ready) output. DTR is inverted then driven 1246 * out to dtr_n. DTR is used to inform the modem that UART is ready to 1247 * establish communications. 1248 * 1249 * There are special considerations when the UART is in loopback mode. See 1250 * alt_16550_loopback_enable() for more information. 1251 * 1252 * \param handle 1253 * The UART device handle. 1254 * 1255 * \retval ALT_E_SUCCESS The operation was successful. 1256 * \retval ALT_E_ERROR The operation failed. 1257 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1258 */ 1259 ALT_STATUS_CODE alt_16550_modem_enable_dtr(ALT_16550_HANDLE_t * handle); 1260 1261 /*! 1262 * Deasserts the DTR (Data Terminal Ready) output. DTR is inverted then driven 1263 * out to dtr_n. 1264 * 1265 * There are special considerations when the UART is in loopback mode. See 1266 * alt_16550_loopback_enable() for more information. 1267 * 1268 * \param handle 1269 * The UART device handle. 1270 * 1271 * \retval ALT_E_SUCCESS The operation was successful. 1272 * \retval ALT_E_ERROR The operation failed. 1273 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1274 */ 1275 ALT_STATUS_CODE alt_16550_modem_disable_dtr(ALT_16550_HANDLE_t * handle); 1276 1277 /*! 1278 * Reads the modem status from the UART. 1279 * 1280 * \param handle 1281 * The UART device handle. 1282 * 1283 * \param status 1284 * [out] Pointer to an output parameter that contains the current 1285 * modem status of the UART as a register mask. 1286 * 1287 * \retval ALT_E_SUCCESS The operation was successful. 1288 * \retval ALT_E_ERROR The operation failed. 1289 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1290 */ 1291 ALT_STATUS_CODE alt_16550_modem_status_get(ALT_16550_HANDLE_t * handle, 1292 uint32_t * status); 1293 1294 /*! 1295 * @} 1296 */ 1297 1298 /*! 1299 * \addtogroup UART_LINE UART Line Interface 1300 * 1301 * This group of APIs provides access, configuration, and control of the UART 1302 * Line interface. 1303 * 1304 * @{ 1305 */ 1306 1307 /*! 1308 * This type definition enumerates the supported databits per frame. 1309 */ 1310 typedef enum ALT_16550_DATABITS_e 1311 { 1312 /*! 1313 * This option selects 5 databits per frame. 1314 */ 1315 ALT_16550_DATABITS_5 = 0, 1316 1317 /*! 1318 * This option selects 6 databits per frame. 1319 */ 1320 ALT_16550_DATABITS_6 = 1, 1321 1322 /*! 1323 * This option selects 7 databits per frame. 1324 */ 1325 ALT_16550_DATABITS_7 = 2, 1326 1327 /*! 1328 * This option selects 8 databits per frame. 1329 */ 1330 ALT_16550_DATABITS_8 = 3 1331 } 1332 ALT_16550_DATABITS_t; 1333 1334 /*! 1335 * This type definition enumerates the supported stopbits per frame. 1336 */ 1337 typedef enum ALT_16550_STOPBITS_e 1338 { 1339 /*! 1340 * This options specifies 1 stopbit per frame. 1341 */ 1342 ALT_16550_STOPBITS_1 = 0, 1343 1344 /*! 1345 * This options specifies 2 stopbits per frame. If the frame is 1346 * configured with 5 databits, 1.5 stopbits is used instead. 1347 */ 1348 ALT_16550_STOPBITS_2 = 1 1349 } 1350 ALT_16550_STOPBITS_t; 1351 1352 /*! 1353 * This type definition enumerates the possible parity to use per frame. 1354 */ 1355 typedef enum ALT_16550_PARITY_e 1356 { 1357 /*! 1358 * This option disables the parity error detection bit in the data frame. 1359 */ 1360 ALT_16550_PARITY_DISABLE = 0, 1361 1362 /*! 1363 * This option enables the odd parity error detection bit in the data 1364 * frame. 1365 */ 1366 ALT_16550_PARITY_ODD = 1, 1367 1368 /*! 1369 * This option enables the even parity error detection bit in the data 1370 * frame. 1371 */ 1372 ALT_16550_PARITY_EVEN = 2 1373 } 1374 ALT_16550_PARITY_t; 1375 1376 /*! 1377 * This type definition enumerates the set of UART line status conditions as 1378 * register mask values. 1379 */ 1380 typedef enum ALT_16550_LINE_STATUS_e 1381 { 1382 /*! 1383 * Receiver FIFO Error. This status indicates that one or more parity 1384 * error, framing error, or break indication exists in the receiver FIFO. 1385 * It is only set when FIFO is enabled. This status cleared when line 1386 * status is read, the character with the issue is at the top of the FIFO, 1387 * and when no other issues exist in the FIFO. 1388 */ 1389 ALT_16550_LINE_STATUS_RFE = 1 << 7, 1390 1391 /*! 1392 * Transmitter EMpTy (Empty). This status indicates that transmitter shift 1393 * register is empty. If FIFOs are enabled, the status is set when the 1394 * transmitter FIFO is also empty. This status is cleared when the 1395 * transmitter shift registers is loaded by writing to the UART 1396 * transmitter buffer or transmitter FIFO if FIFOs are enabled. This is 1397 * done by calling alt_16550_write() and alt_16550_fifo_write() 1398 * respectively. 1399 */ 1400 ALT_16550_LINE_STATUS_TEMT = 1 << 6, 1401 1402 /*! 1403 * Transmitter Holding Register Empty. This status indicates that the 1404 * transmitter will run out of data soon. The definition of soon depends 1405 * on whether the FIFOs are enabled. 1406 * 1407 * If FIFOs are disabled, this status indicates that the transmitter will 1408 * run out of data to send after the current transmit shift register 1409 * completes. In this case, this status is cleared when the data is 1410 * written to the UART. This can be done by calling alt_16550_write(). 1411 * 1412 * If FIFOs are enabled, this status indicates that the transmitter FIFO 1413 * level is below the transmitter trigger level specified. In this case, 1414 * this status is cleared by writing a sufficiently large buffer to the 1415 * transmitter FIFO such that the FIFO is filled above the transmitter 1416 * trigger level specified by calling alt_16550_fifo_write() or by 1417 * adjusting the transmitter trigger level appropriately by calling 1418 * alt_16550_fifo_trigger_set_tx(). 1419 * 1420 * \internal 1421 * The implementation of the UART driver always ensures that IER[7] is 1422 * set. This means that the UART always has Programmable THRE (Transmitter 1423 * Holding Register Empty) Interrupt Mode Enable (PTIME) enabled. 1424 * \endinternal 1425 */ 1426 ALT_16550_LINE_STATUS_THRE = 1 << 5, 1427 1428 /*! 1429 * Break Interrupt. This status indicates that a break interrupt sequence 1430 * is detected in the incoming serial data. This happens when the the data 1431 * is 0 for longer than a frame would normally be transmitted. The break 1432 * interrupt status is cleared by reading the line status by calling 1433 * alt_16550_line_status_get(). 1434 * 1435 * If FIFOs are enabled, this status will be set when the character with 1436 * the break interrupt status is at the top of the receiver FIFO. 1437 */ 1438 ALT_16550_LINE_STATUS_BI = 1 << 4, 1439 1440 /*! 1441 * Framing Error. This status indicates that a framing error occurred in 1442 * the receiver. This happens when the receiver detects a missing or 1443 * incorrect number of stopbit(s). 1444 * 1445 * If FIFOs are enabled, this status will be set when the character with 1446 * the framing error is at the top of the FIFO. When a framing error 1447 * occurs, the UART attempts to resynchronize with the transmitting UART. 1448 * This status is also set if break interrupt occurred. 1449 */ 1450 ALT_16550_LINE_STATUS_FE = 1 << 3, 1451 1452 /*! 1453 * Parity Error. This status indicates that a parity error occurred in the 1454 * receiver. 1455 * 1456 * If FIFOs are enabled, this status will be set when the character with 1457 * the parity error is at the top of the receiver FIFO. This status is 1458 * also set if a break interrupt occurred. 1459 */ 1460 ALT_16550_LINE_STATUS_PE = 1 << 2, 1461 1462 /*! 1463 * Overrun Error. This status indicates that an overrun occurred in the 1464 * receiver. 1465 * 1466 * If FIFOs are disabled, the arriving character will overwrite the 1467 * existing character in the receiver. Any previously existing 1468 * character(s) will be lost. 1469 * 1470 * If FIFOs are disabled, the arriving character will be discarded. The 1471 * buffer will continue to contain the preexisting characters. 1472 */ 1473 ALT_16550_LINE_STATUS_OE = 1 << 1, 1474 1475 /*! 1476 * Data Ready. This status indicates that the receiver or receiver FIFO 1477 * contains at least one character. 1478 */ 1479 ALT_16550_LINE_STATUS_DR = 1 << 0 1480 } 1481 ALT_16550_LINE_STATUS_t; 1482 1483 /*! 1484 * Sets the configuration for a given character frame. 1485 * 1486 * \param handle 1487 * The UART device handle. 1488 * 1489 * \param databits 1490 * The number of databits for each character frame. 1491 * 1492 * \param parity 1493 * The parity to use for each character frame. 1494 * 1495 * \param stopbits 1496 * The number of stopbits for each character frame. 1497 * 1498 * \retval ALT_E_SUCCESS The operation was successful. 1499 * \retval ALT_E_ERROR The operation failed. 1500 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1501 */ 1502 ALT_STATUS_CODE alt_16550_line_config_set(ALT_16550_HANDLE_t * handle, 1503 ALT_16550_DATABITS_t databits, 1504 ALT_16550_PARITY_t parity, 1505 ALT_16550_STOPBITS_t stopbits); 1506 1507 /*! 1508 * Starts transmitting a break condition by transmitting a logic 0 state 1509 * longer than a frame would normally be transmitted. 1510 * 1511 * \param handle 1512 * The UART device handle. 1513 * 1514 * \retval ALT_E_SUCCESS The operation was successful. 1515 * \retval ALT_E_ERROR The operation failed. 1516 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1517 */ 1518 ALT_STATUS_CODE alt_16550_line_break_enable(ALT_16550_HANDLE_t * handle); 1519 1520 /*! 1521 * Stops transmitting a break condition. 1522 * 1523 * \param handle 1524 * The UART device handle. 1525 * 1526 * \retval ALT_E_SUCCESS The operation was successful. 1527 * \retval ALT_E_ERROR The operation failed. 1528 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1529 */ 1530 ALT_STATUS_CODE alt_16550_line_break_disable(ALT_16550_HANDLE_t * handle); 1531 1532 /*! 1533 * Reads the line status from the UART. 1534 * 1535 * \param handle 1536 * The UART device handle. 1537 * 1538 * \param status 1539 * [out] Pointer to an output parameter that contains the current 1540 * line status of the UART. 1541 * 1542 * \retval ALT_E_SUCCESS The operation was successful. 1543 * \retval ALT_E_ERROR The operation failed. 1544 * \retval ALT_E_BAD_ARG The given UART device handle is invalid. 1545 */ 1546 ALT_STATUS_CODE alt_16550_line_status_get(ALT_16550_HANDLE_t * handle, 1547 uint32_t * status); 1548 1549 /*! 1550 * @} 1551 */ 1552 1553 /*! 1554 * @} 1555 */ 1556 1557 #ifdef __cplusplus 1558 } 1559 #endif 1560 1561 #endif /* __ALT_16550_UART_H__ */
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