xilinx-zynqmp/start/mmu-config.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsAArch64XilinxZynqMP
0007  *
0008  * @brief This source file contains the definition of ::aarch64_mmu_config_table
0009  *   and ::aarch64_mmu_config_table_size.
0010  */
0011
0012 /*
0013  * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
0014  * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
0015  *
0016  * Redistribution and use in source and binary forms, with or without
0017  * modification, are permitted provided that the following conditions
0018  * are met:
0019  * 1. Redistributions of source code must retain the above copyright
0020  *    notice, this list of conditions and the following disclaimer.
0021  * 2. Redistributions in binary form must reproduce the above copyright
0022  *    notice, this list of conditions and the following disclaimer in the
0023  *    documentation and/or other materials provided with the distribution.
0024  *
0025  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0026  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0027  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0028  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0029  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0030  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0031  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0032  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0033  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0034  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0035  * POSSIBILITY OF SUCH DAMAGE.
0036  */
0037
0038 #include <bsp.h>
0039 #include <bsp/aarch64-mmu.h>
0040 #include <bsp/start.h>
0041 #include <libcpu/mmu-vmsav8-64.h>
0042
0043 BSP_START_DATA_SECTION const aarch64_mmu_config_entry
0044 aarch64_mmu_config_table[] = {
0045   AARCH64_MMU_DEFAULT_SECTIONS,
0046   {
0047     .begin = 0xf9000000U,
0048     .end = 0xf9100000U,
0049     .flags = AARCH64_MMU_DEVICE
0050   }, {
0051     .begin = 0xfd000000U,
0052     .end = 0xffc00000U,
0053     .flags = AARCH64_MMU_DEVICE
0054   /* Map OCM space */
0055   }, {
0056     .begin = 0xfffc0000U,
0057     .end = 0x100000000U,
0058     .flags = AARCH64_MMU_DATA_RW
0059   }, { /* DDRMC_region1_mem, if not used size is 0 and ignored */
0060     .begin = (uintptr_t) bsp_r1_ram_base,
0061     .end = (uintptr_t) bsp_r1_ram_end,
0062     .flags = AARCH64_MMU_DATA_RW_CACHED
0063   }, {
0064     .begin = 0xb0000000U,
0065     .end = 0xb0200000U,
0066     .flags = AARCH64_MMU_DATA_RW
0067   }
0068 };
0069
0070 BSP_START_DATA_SECTION const size_t aarch64_mmu_config_table_size =
0071   RTEMS_ARRAY_SIZE(aarch64_mmu_config_table);