xilinx-zynqmp/start/bspstartmmu.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsAArch64XilinxZynqMP
0007  *
0008  * @brief This source file contains the default MMU tables and setup.
0009  */
0010
0011 /*
0012  * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
0013  * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #include <bsp.h>
0038 #include <bsp/aarch64-mmu.h>
0039 #include <libcpu/mmu-vmsav8-64.h>
0040
0041 #include <rtems/malloc.h>
0042 #include <rtems/sysinit.h>
0043
0044 /*
0045  * Create an MMU table to get the R1 base and end. This avoids
0046  * relocation errors as the R1 addresses are in the upper A64 address
0047  * space.
0048  *
0049  * The aarch64_mmu_config_table table cannot be used because the regions
0050  * in that table have no identifiers to indicate which region is the
0051  * the DDRMC_region1_mem region.
0052  */
0053 static const struct mem_region {
0054   uintptr_t begin;
0055   uintptr_t end;
0056 } bsp_r1_region[] = {
0057   { /* DDRMC_region1_mem, if not used size is 0 and ignored */
0058     .begin = (uintptr_t) bsp_r1_ram_base,
0059     .end = (uintptr_t) bsp_r1_ram_end,
0060   }
0061 };
0062
0063 /*
0064  * Make weak and let the user override.
0065  */
0066 BSP_START_TEXT_SECTION void
0067 zynqmp_setup_mmu_and_cache( void ) __attribute__ ((weak));
0068
0069 BSP_START_TEXT_SECTION void
0070 zynqmp_setup_mmu_and_cache( void )
0071 {
0072   aarch64_mmu_control *control = &aarch64_mmu_instance;
0073
0074   aarch64_mmu_setup();
0075
0076   aarch64_mmu_setup_translation_table(
0077     control,
0078     &aarch64_mmu_config_table[ 0 ],
0079     aarch64_mmu_config_table_size
0080   );
0081
0082   aarch64_mmu_enable( control );
0083 }
0084
0085 /*
0086  * Make weak and let the user override.
0087  */
0088 BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void )
0089 __attribute__ ( ( weak ) );
0090
0091 BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void )
0092 {
0093   aarch64_mmu_control *control = &aarch64_mmu_instance;
0094
0095   /* Perform basic MMU setup */
0096   aarch64_mmu_setup();
0097   aarch64_mmu_enable( control );
0098 }
0099
0100 void bsp_r1_heap_extend(void);
0101 void bsp_r1_heap_extend(void)
0102 {
0103   const struct mem_region* r1 = &bsp_r1_region[0];
0104   if (r1->begin != r1->end) {
0105     rtems_status_code sc =
0106       rtems_heap_extend((void*) r1->begin, r1->end - r1->begin);
0107     if (sc != RTEMS_SUCCESSFUL) {
0108       bsp_fatal(BSP_FATAL_HEAP_EXTEND_ERROR);
0109     }
0110   }
0111 }
0112
0113 /*
0114  * Initialise after the IDLE thread exists so the protected heap
0115  * extend call has a valid context.
0116  */
0117 RTEMS_SYSINIT_ITEM(
0118   bsp_r1_heap_extend,
0119   RTEMS_SYSINIT_IDLE_THREADS,
0120   RTEMS_SYSINIT_ORDER_LAST
0121 );