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File indexing completed on 2025-05-11 08:22:42

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsAArch64XilinxZynqMP
0007  *
0008  * @brief This source file contains the implementation of this BSP's startup
0009  *   hooks.
0010  */
0011 
0012 /*
0013  * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
0014  * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
0015  *
0016  * Redistribution and use in source and binary forms, with or without
0017  * modification, are permitted provided that the following conditions
0018  * are met:
0019  * 1. Redistributions of source code must retain the above copyright
0020  *    notice, this list of conditions and the following disclaimer.
0021  * 2. Redistributions in binary form must reproduce the above copyright
0022  *    notice, this list of conditions and the following disclaimer in the
0023  *    documentation and/or other materials provided with the distribution.
0024  *
0025  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0026  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0027  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0028  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0029  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0030  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0031  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0032  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0033  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0034  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0035  * POSSIBILITY OF SUCH DAMAGE.
0036  */
0037 
0038 #include <bsp.h>
0039 #include <bsp/start.h>
0040 
0041 #ifdef RTEMS_SMP
0042 #include <rtems/score/aarch64-system-registers.h>
0043 #include <rtems/score/smpimpl.h>
0044 
0045 #include <bsp/irq-generic.h>
0046 #endif
0047 
0048 #ifdef BSP_START_ENABLE_EL3_START_SUPPORT
0049 BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
0050 {
0051   /* do nothing */
0052 }
0053 #endif
0054 
0055 BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
0056 {
0057   AArch64_start_set_vector_base();
0058 
0059 #ifdef RTEMS_SMP
0060   uint32_t cpu_index_self;
0061 
0062   cpu_index_self = _SMP_Get_current_processor();
0063 
0064   if ( cpu_index_self != 0 ) {
0065     zynqmp_setup_secondary_cpu_mmu_and_cache();
0066     arm_gic_irq_initialize_secondary_cpu();
0067 
0068     bsp_interrupt_vector_enable( ARM_GIC_IRQ_SGI_0 );
0069     _SMP_Start_multitasking_on_secondary_processor(
0070       _Per_CPU_Get_by_index( cpu_index_self )
0071     );
0072     /* Unreached */
0073   }
0074 #endif /* RTEMS_SMP */
0075 
0076   zynqmp_setup_mmu_and_cache();
0077   bsp_start_clear_bss();
0078 }