aarch64/xilinx-zynqmp/jffs2_xqspipsu.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #include <string.h>
0029
0030 #include <bsp/irq.h>
0031 #include <bsp/jffs2_xqspipsu.h>
0032 #include <rtems/jffs2.h>
0033 #include <rtems/libio.h>
0034 #include <xqspipsu-flash-helper.h>
0035
0036 typedef struct {
0037   rtems_jffs2_flash_control super;
0038   XQspiPsu *qspipsu;
0039 } flash_control;
0040
0041 #define FLASH_DEVICE_ID 0xbb20 /* Type: 0xbb, Capacity: 0x20 */
0042
0043 static flash_control *get_flash_control( rtems_jffs2_flash_control *super )
0044 {
0045   return (flash_control *) super;
0046 }
0047
0048 static int do_read(
0049   rtems_jffs2_flash_control *super,
0050   uint32_t offset,
0051   unsigned char *buffer,
0052   size_t size_of_buffer
0053 )
0054 {
0055   int Status;
0056
0057   flash_control *self = get_flash_control( super );
0058   XQspiPsu *QspiPsuPtr = self->qspipsu;
0059   u8* ReadBuffer = NULL;
0060
0061   Status = QspiPsu_NOR_Read_Page(
0062     QspiPsuPtr,
0063     offset,
0064     size_of_buffer,
0065     &ReadBuffer
0066   );
0067   if ( Status != XST_SUCCESS ) {
0068     return Status;
0069   }
0070
0071   /*
0072    * We have to copy since we can't be sure that buffer is properly aligned.
0073    */
0074   memcpy( buffer, ReadBuffer, size_of_buffer );
0075
0076   return 0;
0077 }
0078
0079 static int do_write(
0080   rtems_jffs2_flash_control *super,
0081   uint32_t offset,
0082   const unsigned char *buffer,
0083   size_t size_of_buffer
0084 )
0085 {
0086   int Status;
0087
0088   flash_control *self = get_flash_control( super );
0089   XQspiPsu *QspiPsuPtr = self->qspipsu;
0090
0091   Status = QspiPsu_NOR_Write(
0092     QspiPsuPtr,
0093     offset,
0094     size_of_buffer,
0095     (unsigned char *) buffer
0096   );
0097   if ( Status != XST_SUCCESS ) {
0098     return Status;
0099   }
0100
0101   return 0;
0102 }
0103
0104 static int do_erase(
0105   rtems_jffs2_flash_control *super,
0106   uint32_t offset
0107 )
0108 {
0109   int Status;
0110
0111   flash_control *self = get_flash_control( super );
0112   XQspiPsu *QspiPsuPtr = self->qspipsu;
0113
0114   Status = QspiPsu_NOR_Erase(
0115     QspiPsuPtr,
0116     offset,
0117     super->block_size
0118   );
0119   if ( Status != XST_SUCCESS ) {
0120     return Status;
0121   }
0122
0123   return 0;
0124 }
0125
0126 static void do_destroy( rtems_jffs2_flash_control *super )
0127 {
0128   flash_control *self = get_flash_control( super );
0129
0130   rtems_interrupt_handler_remove(
0131     ZYNQMP_IRQ_QSPI,
0132     (rtems_interrupt_handler) XQspiPsu_InterruptHandler,
0133     self->qspipsu
0134   );
0135 }
0136
0137 static flash_control flash_instance = {
0138   .super = {
0139     .read              = do_read,
0140     .write             = do_write,
0141     .erase             = do_erase,
0142     .destroy           = do_destroy,
0143     .device_identifier = FLASH_DEVICE_ID
0144   }
0145 };
0146
0147 static rtems_jffs2_mount_data mount_data = {
0148   .flash_control      = &flash_instance.super,
0149   .compressor_control = NULL
0150 };
0151
0152 int xilinx_zynqmp_nor_jffs2_initialize(
0153   const char *mount_dir,
0154   XQspiPsu *qspipsu_ptr
0155 )
0156 {
0157   int rv = 0;
0158
0159   flash_instance.qspipsu = qspipsu_ptr;
0160
0161   rv = QspiPsu_NOR_Initialize(
0162     flash_instance.qspipsu,
0163     ZYNQMP_IRQ_QSPI
0164   );
0165   if ( rv != 0 ) {
0166     return rv;
0167   }
0168
0169   uint32_t sect_size = QspiPsu_NOR_Get_Sector_Size(qspipsu_ptr);
0170   uint32_t flash_size = QspiPsu_NOR_Get_Device_Size(qspipsu_ptr);
0171   flash_instance.super.flash_size = flash_size;
0172   flash_instance.super.block_size = sect_size;
0173
0174   rv = mount(
0175     NULL,
0176     mount_dir,
0177     RTEMS_FILESYSTEM_TYPE_JFFS2,
0178     RTEMS_FILESYSTEM_READ_WRITE,
0179     &mount_data
0180   );
0181   if ( rv != 0 ) {
0182     return rv;
0183   }
0184
0185   return 0;
0186 }