Warning, /bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts is written in an unsupported language. File is not indexed.
0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004 * @file
0005 *
0006 * @ingroup RTEMSBSPsAArch64XilinxZynqMP
0007 *
0008 * @brief This file provides the base ZynqMP device tree
0009 */
0010
0011 /*
0012 * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
0013 * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
0014 *
0015 * Redistribution and use in source and binary forms, with or without
0016 * modification, are permitted provided that the following conditions
0017 * are met:
0018 * 1. Redistributions of source code must retain the above copyright
0019 * notice, this list of conditions and the following disclaimer.
0020 * 2. Redistributions in binary form must reproduce the above copyright
0021 * notice, this list of conditions and the following disclaimer in the
0022 * documentation and/or other materials provided with the distribution.
0023 *
0024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034 * POSSIBILITY OF SUCH DAMAGE.
0035 */
0036
0037 /dts-v1/;
0038
0039 / {
0040 #address-cells = <0x02>;
0041 #size-cells = <0x02>;
0042
0043 amba {
0044 compatible = "simple-bus";
0045 #address-cells = <0x02>;
0046 #size-cells = <0x02>;
0047 ranges;
0048
0049 interrupt-controller@f9010000 {
0050 compatible = "arm,gic-400";
0051 #address-cells = <0x02>;
0052 #interrupt-cells = <0x03>;
0053 reg = <0x00 0xf9010000 0x00 0x10000>;
0054 interrupt-controller;
0055 phandle = <0x01>;
0056 };
0057
0058 ethernet@ff0b0000 {
0059 compatible = "cdns,gem";
0060 status = "okay";
0061 interrupt-parent = <0x01>;
0062 interrupts = <0x00 0x39 0x04>;
0063 reg = <0x00 0xff0b0000 0x00 0x1000>;
0064 phy-mode = "rgmii-id";
0065 ref-clock-num = <0>;
0066 };
0067
0068 ethernet@ff0c0000 {
0069 compatible = "cdns,gem";
0070 status = "okay";
0071 interrupt-parent = <0x01>;
0072 interrupts = <0x00 0x3b 0x04>;
0073 reg = <0x00 0xff0c0000 0x00 0x1000>;
0074 phy-mode = "rgmii-id";
0075 ref-clock-num = <1>;
0076 };
0077
0078 ethernet@ff0d0000 {
0079 compatible = "cdns,gem";
0080 status = "okay";
0081 interrupt-parent = <0x01>;
0082 interrupts = <0x00 0x3d 0x04>;
0083 reg = <0x00 0xff0d0000 0x00 0x1000>;
0084 phy-mode = "rgmii-id";
0085 ref-clock-num = <2>;
0086 };
0087
0088 ethernet@ff0e0000 {
0089 compatible = "cdns,gem";
0090 status = "okay";
0091 interrupt-parent = <0x01>;
0092 interrupts = <0x00 0x3f 0x04>;
0093 reg = <0x00 0xff0e0000 0x00 0x1000>;
0094 phy-mode = "rgmii-id";
0095 ref-clock-num = <3>;
0096 };
0097 };
0098 };
