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File indexing completed on 2025-05-11 08:22:42

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsAArch64XilinxVersal
0007  *
0008  * @brief This source file contains the default MMU tables and setup.
0009  */
0010 
0011 /*
0012  * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #include <bsp.h>
0037 #include <bsp/start.h>
0038 #include <bsp/aarch64-mmu.h>
0039 #include <libcpu/mmu-vmsav8-64.h>
0040 
0041 #include <rtems/malloc.h>
0042 #include <rtems/sysinit.h>
0043 
0044 BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
0045 versal_mmu_config_table[] = {
0046   AARCH64_MMU_DEFAULT_SECTIONS,
0047   {  /* Devices */
0048     .begin = 0xf1000000U,
0049     .end = 0xf2000000U,
0050     .flags = AARCH64_MMU_DEVICE
0051   }, {  /* APU GIC */
0052     .begin = 0xf9000000U,
0053     .end = 0xf90c0000U,
0054     .flags = AARCH64_MMU_DEVICE
0055   }, { /* FPD CSRs */
0056     .begin = 0xfd000000U,
0057     .end = 0xfe000000U,
0058     .flags = AARCH64_MMU_DEVICE
0059   }, { /* LPD CSRs */
0060     .begin = 0xfe000000U,
0061     .end = 0xfe800000U,
0062     .flags = AARCH64_MMU_DEVICE
0063   }, { /* LPD IOP CSRs and LPD peripherals */
0064     .begin = 0xff000000U,
0065     .end = 0xffc00000U,
0066     .flags = AARCH64_MMU_DEVICE
0067   }, { /* DDRMC0_region1_mem, if not used size is 0 and ignored */
0068     .begin = (uintptr_t) bsp_r1_ram_base,
0069     .end = (uintptr_t) bsp_r1_ram_end,
0070     .flags = AARCH64_MMU_DATA_RW_CACHED
0071   }
0072 };
0073 
0074 /*
0075  * Create an MMU table to get the R1 base and end. This avoids
0076  * relocation errors as the R1 addresses are in the upper A64 address
0077  * space.
0078  *
0079  * The versal_mmu_config_table table cannot be used because the regions
0080  * in that table have no identifiers to indicate which region is the
0081  * the DDRMC0_region1_mem region.
0082  */
0083 static const struct mem_region {
0084   uintptr_t begin;
0085   uintptr_t end;
0086 } bsp_r1_region[] = {
0087   { /* DDRMC0_region1_mem, if not used size is 0 and ignored */
0088     .begin = (uintptr_t) bsp_r1_ram_base,
0089     .end = (uintptr_t) bsp_r1_ram_end,
0090   }
0091 };
0092 
0093 /*
0094  * Make weak and let the user override.
0095  */
0096 BSP_START_TEXT_SECTION void
0097 versal_setup_mmu_and_cache( void ) __attribute__ ((weak));
0098 
0099 BSP_START_TEXT_SECTION void
0100 versal_setup_mmu_and_cache( void )
0101 {
0102   aarch64_mmu_control *control = &aarch64_mmu_instance;
0103 
0104   aarch64_mmu_setup();
0105 
0106   aarch64_mmu_setup_translation_table(
0107     control,
0108     &versal_mmu_config_table[ 0 ],
0109     RTEMS_ARRAY_SIZE( versal_mmu_config_table )
0110   );
0111 
0112   aarch64_mmu_enable( control );
0113 }
0114 
0115 void bsp_r1_heap_extend(void);
0116 void bsp_r1_heap_extend(void)
0117 {
0118   const struct mem_region* r1 = &bsp_r1_region[0];
0119   if (r1->begin != r1->end) {
0120     rtems_status_code sc =
0121       rtems_heap_extend((void*) r1->begin, r1->end - r1->begin);
0122     if (sc != RTEMS_SUCCESSFUL) {
0123       bsp_fatal(BSP_FATAL_HEAP_EXTEND_ERROR);
0124     }
0125   }
0126 }
0127 
0128 /*
0129  * Initialise after the IDLE thread exists so the protected heap
0130  * extend call has a valid context.
0131  */
0132 RTEMS_SYSINIT_ITEM(
0133   bsp_r1_heap_extend,
0134   RTEMS_SYSINIT_IDLE_THREADS,
0135   RTEMS_SYSINIT_ORDER_LAST
0136 );