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File indexing completed on 2025-05-11 08:22:42

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup versal_uart
0007  *
0008  * @brief Xilinx Versal UART support.
0009  */
0010 
0011 /*
0012  * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #ifndef LIBBSP_ARM_XILINX_VERSAL_UART_H
0037 #define LIBBSP_ARM_XILINX_VERSAL_UART_H
0038 
0039 #include <rtems/termiostypes.h>
0040 #include <dev/serial/arm-pl011.h>
0041 #include <dev/serial/arm-pl011-regs.h>
0042 
0043 #ifdef __cplusplus
0044 extern "C" {
0045 #endif /* __cplusplus */
0046 
0047 /**
0048  * @defgroup versal_uart Xilinx Versal UART Support
0049  * @ingroup RTEMSBSPsARMVersal
0050  * @brief UART Support
0051  *
0052  * This driver operates an instance of the Xilinx UART present in the
0053  * family of Xilinx Versal SoCs.
0054  */
0055 
0056 typedef struct {
0057   arm_pl011_context pl011_ctx;
0058   volatile bool transmitting;
0059 } versal_pl011_context;
0060 
0061 extern const rtems_termios_device_handler versal_uart_handler;
0062 
0063 #define VERSAL_UART_DEFAULT_BAUD 115200
0064 
0065 int versal_uart_initialize(rtems_termios_device_context *base);
0066 
0067 void versal_uart_reset_tx_flush(rtems_termios_device_context *base);
0068 
0069 #ifdef __cplusplus
0070 }
0071 #endif /* __cplusplus */
0072 
0073 #endif /* LIBBSP_ARM_XILINX_VERSAL_UART_H */