raspberrypi/gpio/gpio.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsAArch64RaspberryPi
0007  *
0008  * @brief GPIO Driver
0009  */
0010
0011 /*
0012  * Copyright (C) 2023 Utkarsh Verma
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <rtems/rtems/status.h>
0037 #include <stdint.h>
0038
0039 #include <bsp/rpi-gpio.h>
0040 #include <bsp/raspberrypi.h>
0041 #define BSP_GPIO_BASE      BCM2711_GPIO_BASE
0042 #define BSP_GPIO_SIZE      BCM2711_GPIO_SIZE
0043 #define BSP_GPIO_PIN_COUNT BCM2711_GPIO_PIN_COUNT
0044
0045 #define GPFSEL0                BCM2835_REG(BSP_GPIO_BASE + 0x00)
0046 #define GPSET0                 BCM2835_REG(BSP_GPIO_BASE + 0x1c)
0047 #define GPCLR0                 BCM2835_REG(BSP_GPIO_BASE + 0x28)
0048 #define GPIO_PUP_PDN_CTRL_REG0 BCM2835_REG(BSP_GPIO_BASE + 0xe4)
0049 #define FSELn_SIZE             3
0050 #define CLRn_SIZE              1
0051 #define SETn_SIZE              1
0052 #define REG_SET                1
0053
0054 static rtems_status_code raspberrypi_gpio_set_reg(
0055   volatile uint32_t *base_reg,
0056   const unsigned int pin,
0057   const uint32_t     value,
0058   const unsigned int field_size
0059 )
0060 {
0061   unsigned int field_mask, n_fields, shift, tmp;
0062   volatile uint32_t *reg;
0063
0064   if (pin > BSP_GPIO_PIN_COUNT)
0065     return RTEMS_INVALID_NUMBER;
0066
0067   field_mask = (1 << field_size) - 1;
0068   if (value > field_mask)
0069     return RTEMS_INVALID_NUMBER;
0070
0071   /* GPIO registers are uniformly subdivided */
0072   n_fields = sizeof(uint32_t) * 8 / field_size;
0073
0074   /* Registers are sequentially mapped for each `n_field` GPIOs */
0075   reg = base_reg + pin / n_fields;
0076   shift = (pin % n_fields) * field_size;
0077
0078   tmp = *reg;
0079   tmp &= ~(field_mask << shift);  /* Clear the field */
0080   tmp |= value << shift;          /* Set value to the field */
0081   *reg = tmp;
0082
0083   return RTEMS_SUCCESSFUL;
0084 }
0085
0086 rtems_status_code raspberrypi_gpio_set_function(
0087   const unsigned int  pin,
0088   const raspberrypi_gpio_function value
0089 )
0090 {
0091   return raspberrypi_gpio_set_reg(&GPFSEL0, pin, value, FSELn_SIZE);
0092 }
0093
0094 rtems_status_code raspberrypi_gpio_clear_pin(const unsigned int pin)
0095 {
0096   return raspberrypi_gpio_set_reg(&GPCLR0, pin, REG_SET, CLRn_SIZE);
0097 }
0098
0099 rtems_status_code raspberrypi_gpio_set_pin(const unsigned int pin)
0100 {
0101   return raspberrypi_gpio_set_reg(&GPSET0, pin, REG_SET, SETn_SIZE);
0102 }
0103
0104 rtems_status_code raspberrypi_gpio_set_pull(
0105   const unsigned int pin,
0106   const raspberrypi_gpio_pull value
0107 )
0108 {
0109   return raspberrypi_gpio_set_reg(&GPIO_PUP_PDN_CTRL_REG0, pin, value, 2);
0110 }